From d2f4ee0ae72f93a46436176b4b859fa5723575cc Mon Sep 17 00:00:00 2001 From: Yan Wang Date: Sat, 26 Feb 2022 11:05:38 +0800 Subject: [PATCH] pl011: reset read FIFO when UARTTIMSC=0 & UARTICR=0xffff We can enable ACPI when AArch64 Linux is booted with QEMU and UEFI (AAVMF). When VM is booting and the SBSA driver has not initialized, writting data that exceds 32 bytes will cause the read FIFO full and proceeding data will be lost. The searil port appears to be stuck in this abnormal situation. A hack to reset read FIFO when UARTTIMSC=0 & UARTICR=0xffff appears to resolve the issue. The question is fully discussed at https://www.spinics.net/lists/linux-serial/msg23163.html Signed-off-by: Haibin Wang Reviewed-by: Shannon Zhao Reviewed-by: Ying Fang Signed-off-by: Yan Wang --- ...-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 pl011-reset-read-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch diff --git a/pl011-reset-read-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch b/pl011-reset-read-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch new file mode 100644 index 0000000..a917143 --- /dev/null +++ b/pl011-reset-read-FIFO-when-UARTTIMSC-0-UARTICR-0xfff.patch @@ -0,0 +1,42 @@ +From 696abba190a0daad488d709d733f0d1f10df6f89 Mon Sep 17 00:00:00 2001 +From: Ying Fang +Date: Mon, 29 Jul 2019 16:16:35 +0800 +Subject: [PATCH 1/6] pl011: reset read FIFO when UARTTIMSC=0 & UARTICR=0xffff + +We can enable ACPI when AArch64 Linux is booted with QEMU and UEFI (AAVMF). +When VM is booting and the SBSA driver has not initialized, writting data +that exceds 32 bytes will cause the read FIFO full and proceeding data will +be lost. The searil port appears to be stuck in this abnormal situation. + +A hack to reset read FIFO when UARTTIMSC=0 & UARTICR=0xffff appears to +resolve the issue. + +The question is fully discussed at +https://www.spinics.net/lists/linux-serial/msg23163.html + +Signed-off-by: Haibin Wang +Reviewed-by: Shannon Zhao +Reviewed-by: Ying Fang +Signed-off-by: Yan Wang +--- + hw/char/pl011.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/hw/char/pl011.c b/hw/char/pl011.c +index 6e2d7f7..8ca2a4e 100644 +--- a/hw/char/pl011.c ++++ b/hw/char/pl011.c +@@ -255,6 +255,10 @@ static void pl011_write(void *opaque, hwaddr offset, + case 17: /* UARTICR */ + s->int_level &= ~value; + pl011_update(s); ++ if (!s->int_enabled && !s->int_level) { ++ s->read_count = 0; ++ s->read_pos = 0; ++ } + break; + case 18: /* UARTDMACR */ + s->dmacr = value; +-- +1.9.1 +