From 3265d8ae1df6666aab6aa75c18eee8e53b779dab Mon Sep 17 00:00:00 2001 From: Chen Qun Date: Thu, 18 Jul 2019 15:34:05 +0800 Subject: [PATCH] target/i386: Introduce Denverton CPU model Denverton is the Atom Processor of Intel Harrisonville platform. For more information: https://ark.intel.com/content/www/us/en/ark/products/\ codename/63508/denverton.html Signed-off-by: Tao Xu Message-Id: <20190718073405.28301-1-tao3.xu@intel.com> Signed-off-by: Eduardo Habkost --- ...t-i386-Introduce-Denverton-CPU-model.patch | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 target-i386-Introduce-Denverton-CPU-model.patch diff --git a/target-i386-Introduce-Denverton-CPU-model.patch b/target-i386-Introduce-Denverton-CPU-model.patch new file mode 100644 index 0000000..3e9debe --- /dev/null +++ b/target-i386-Introduce-Denverton-CPU-model.patch @@ -0,0 +1,79 @@ +From 7d602cefa04f4992d913683c1a5826abc4806e41 Mon Sep 17 00:00:00 2001 +From: Tao Xu +Date: Thu, 18 Jul 2019 15:34:05 +0800 +Subject: [PATCH] target/i386: Introduce Denverton CPU model + +Denverton is the Atom Processor of Intel Harrisonville platform. + +For more information: +https://ark.intel.com/content/www/us/en/ark/products/\ +codename/63508/denverton.html + +Signed-off-by: Tao Xu +Message-Id: <20190718073405.28301-1-tao3.xu@intel.com> +Signed-off-by: Eduardo Habkost +--- + target/i386/cpu.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 47 insertions(+) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index 5af4fca350..d3742ef4ac 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -2552,6 +2552,53 @@ static X86CPUDefinition builtin_x86_defs[] = { + .xlevel = 0x80000008, + .model_id = "Intel Xeon Processor (Icelake)", + }, ++ { ++ .name = "Denverton", ++ .level = 21, ++ .vendor = CPUID_VENDOR_INTEL, ++ .family = 6, ++ .model = 95, ++ .stepping = 1, ++ .features[FEAT_1_EDX] = ++ CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC | ++ CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | ++ CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | ++ CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH | CPUID_MMX | CPUID_FXSR | ++ CPUID_SSE | CPUID_SSE2, ++ .features[FEAT_1_ECX] = ++ CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_MONITOR | ++ CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_SSE41 | ++ CPUID_EXT_SSE42 | CPUID_EXT_X2APIC | CPUID_EXT_MOVBE | ++ CPUID_EXT_POPCNT | CPUID_EXT_TSC_DEADLINE_TIMER | ++ CPUID_EXT_AES | CPUID_EXT_XSAVE | CPUID_EXT_RDRAND, ++ .features[FEAT_8000_0001_EDX] = ++ CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | CPUID_EXT2_PDPE1GB | ++ CPUID_EXT2_RDTSCP | CPUID_EXT2_LM, ++ .features[FEAT_8000_0001_ECX] = ++ CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, ++ .features[FEAT_7_0_EBX] = ++ CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_ERMS | ++ CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_SMAP | ++ CPUID_7_0_EBX_CLFLUSHOPT | CPUID_7_0_EBX_SHA_NI, ++ .features[FEAT_7_0_EDX] = ++ CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES | ++ CPUID_7_0_EDX_SPEC_CTRL_SSBD, ++ /* ++ * Missing: XSAVES (not supported by some Linux versions, ++ * including v4.1 to v4.12). ++ * KVM doesn't yet expose any XSAVES state save component, ++ * and the only one defined in Skylake (processor tracing) ++ * probably will block migration anyway. ++ */ ++ .features[FEAT_XSAVE] = ++ CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, ++ .features[FEAT_6_EAX] = ++ CPUID_6_EAX_ARAT, ++ .features[FEAT_ARCH_CAPABILITIES] = ++ MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY, ++ .xlevel = 0x80000008, ++ .model_id = "Intel Atom Processor (Denverton)", ++ }, + { + .name = "Snowridge", + .level = 27, +-- +2.27.0 +