57 lines
2.3 KiB
Diff
57 lines
2.3 KiB
Diff
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From 3b3fdfa6d5439298b883e2e223fa04a2209612f5 Mon Sep 17 00:00:00 2001
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From: Feiyang Chen <chris.chenfeiyang@gmail.com>
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Date: Fri, 28 Jun 2024 13:33:57 +1000
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Subject: [PATCH 47/78] target/loongarch: Remove avail_64 in trans_srai_w() and
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simplify it
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Since srai.w is a valid instruction on la32, remove the avail_64 check
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and simplify trans_srai_w().
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Fixes: c0c0461e3a06 ("target/loongarch: Add avail_64 to check la64-only instructions")
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Signed-off-by: Feiyang Chen <chris.chenfeiyang@gmail.com>
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Message-Id: <20240628033357.50027-1-chris.chenfeiyang@gmail.com>
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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target/loongarch/tcg/insn_trans/trans_shift.c.inc | 15 +++------------
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1 file changed, 3 insertions(+), 12 deletions(-)
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diff --git a/target/loongarch/tcg/insn_trans/trans_shift.c.inc b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
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index 2f4bd6ff28..377307785a 100644
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--- a/target/loongarch/tcg/insn_trans/trans_shift.c.inc
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+++ b/target/loongarch/tcg/insn_trans/trans_shift.c.inc
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@@ -67,19 +67,9 @@ static void gen_rotr_d(TCGv dest, TCGv src1, TCGv src2)
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tcg_gen_rotr_tl(dest, src1, t0);
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}
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-static bool trans_srai_w(DisasContext *ctx, arg_srai_w *a)
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+static void gen_sari_w(TCGv dest, TCGv src1, target_long imm)
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{
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- TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
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- TCGv src1 = gpr_src(ctx, a->rj, EXT_ZERO);
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-
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- if (!avail_64(ctx)) {
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- return false;
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- }
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-
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- tcg_gen_sextract_tl(dest, src1, a->imm, 32 - a->imm);
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- gen_set_gpr(a->rd, dest, EXT_NONE);
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-
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- return true;
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+ tcg_gen_sextract_tl(dest, src1, imm, 32 - imm);
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}
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TRANS(sll_w, ALL, gen_rrr, EXT_ZERO, EXT_NONE, EXT_SIGN, gen_sll_w)
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@@ -94,6 +84,7 @@ TRANS(slli_w, ALL, gen_rri_c, EXT_NONE, EXT_SIGN, tcg_gen_shli_tl)
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TRANS(slli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shli_tl)
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TRANS(srli_w, ALL, gen_rri_c, EXT_ZERO, EXT_SIGN, tcg_gen_shri_tl)
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TRANS(srli_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_shri_tl)
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+TRANS(srai_w, ALL, gen_rri_c, EXT_NONE, EXT_NONE, gen_sari_w)
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TRANS(srai_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_sari_tl)
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TRANS(rotri_w, 64, gen_rri_v, EXT_NONE, EXT_NONE, gen_rotr_w)
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TRANS(rotri_d, 64, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_rotri_tl)
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--
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2.39.1
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