43 lines
1.6 KiB
Diff
43 lines
1.6 KiB
Diff
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From fa79379bd4c5b72e11f14f24439d5d501b8cc98b Mon Sep 17 00:00:00 2001
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From: Bibo Mao <maobibo@loongson.cn>
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Date: Sat, 14 Sep 2024 14:46:45 +0800
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Subject: [PATCH 55/78] target/loongarch: Avoid bits shift exceeding width of
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bool type
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Variable env->cf[i] is defined as bool type, it is treated as int type
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with shift operation. However the max possible width is 56 for the shift
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operation, exceeding the width of int type. And there is existing api
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read_fcc() which is converted to u64 type with bitwise shift, it can be
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used to dump fp registers into coredump note segment.
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Resolves: Coverity CID 1561133
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Signed-off-by: Bibo Mao <maobibo@loongson.cn>
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Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
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Message-Id: <20240914064645.2099169-1-maobibo@loongson.cn>
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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target/loongarch/arch_dump.c | 6 +-----
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1 file changed, 1 insertion(+), 5 deletions(-)
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diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
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index 4986db970e..d9e1120333 100644
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--- a/target/loongarch/arch_dump.c
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+++ b/target/loongarch/arch_dump.c
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@@ -97,11 +97,7 @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
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loongarch_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
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note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
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-
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- for (i = 0; i < 8; i++) {
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- note.fpu.fcc |= env->cf[i] << (8 * i);
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- }
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- note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
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+ note.fpu.fcc = cpu_to_dump64(s, read_fcc(env));
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for (i = 0; i < 32; ++i) {
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note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
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--
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2.39.1
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