46 lines
1.8 KiB
Diff
46 lines
1.8 KiB
Diff
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From 1ad2e774f4fd3f720d5db07e86fe60df13f21a6d Mon Sep 17 00:00:00 2001
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From: Heyi Guo <guoheyi@huawei.com>
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Date: Mon, 9 Dec 2019 14:37:19 +0800
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Subject: [PATCH] hw/arm/acpi: enable SHPC native hot plug
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After the introduction of generic PCIe root port and PCIe-PCI bridge,
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we will also have SHPC controller on ARM, so just enable SHPC native
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hot plug.
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Also update tests/data/acpi/virt/DSDT* to pass "make check".
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Cc: Shannon Zhao <shannon.zhaosl@gmail.com>
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Cc: Peter Maydell <peter.maydell@linaro.org>
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Cc: "Michael S. Tsirkin" <mst@redhat.com>
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Cc: Igor Mammedov <imammedo@redhat.com>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Reviewed-by: Igor Mammedov <imammedo@redhat.com>
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Signed-off-by: Heyi Guo <guoheyi@huawei.com>
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Message-id: 20191209063719.23086-3-guoheyi@huawei.com
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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---
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hw/arm/virt-acpi-build.c | 7 ++++++-
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1 file changed, 6 insertions(+), 1 deletion(-)
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diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
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index 2cfac7b84f..588e7f2680 100644
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--- a/hw/arm/virt-acpi-build.c
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+++ b/hw/arm/virt-acpi-build.c
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@@ -347,7 +347,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap,
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aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
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aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP")));
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aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL")));
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- aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL),
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+
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+ /*
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+ * Allow OS control for all 5 features:
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+ * PCIeHotplug SHPCHotplug PME AER PCIeCapability.
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+ */
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+ aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL),
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aml_name("CTRL")));
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ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));
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--
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2.23.0
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