36 lines
1.3 KiB
Diff
36 lines
1.3 KiB
Diff
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From 97d5c6c621569b011a2122423d0f630bd71de5ff Mon Sep 17 00:00:00 2001
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From: Jingyi Wang <wangjingyi11@huawei.com>
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Date: Fri, 9 Jul 2021 11:17:19 +0800
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Subject: [PATCH] target/i386: Add missed security features to Cooperlake CPU
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model
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It lacks two security feature bits in MSR_IA32_ARCH_CAPABILITIES in
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current Cooperlake CPU model, so add them.
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This is part of uptream commit 2dea9d9
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Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
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---
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target/i386/cpu.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 5329d73316..50d6ef9de4 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -2420,7 +2420,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
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CPUID_7_0_EDX_SPEC_CTRL_SSBD | CPUID_7_0_EDX_ARCH_CAPABILITIES,
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.features[FEAT_ARCH_CAPABILITIES] =
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MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_IBRS_ALL |
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- MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO,
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+ MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY | MSR_ARCH_CAP_MDS_NO |
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+ MSR_ARCH_CAP_PSCHANGE_MC_NO | MSR_ARCH_CAP_TAA_NO,
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.features[FEAT_7_1_EAX] =
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CPUID_7_1_EAX_AVX512_BF16,
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/*
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--
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2.27.0
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