100 lines
3.8 KiB
Diff
100 lines
3.8 KiB
Diff
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From 3c4b4c4fc3c71b375490233bb9209763d7094ee9 Mon Sep 17 00:00:00 2001
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From: Yan Wang <wangyan122@huawei.com>
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Date: Tue, 8 Feb 2022 16:10:31 +0800
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Subject: [PATCH] pcie: Add pcie-root-port fast plug/unplug feature
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If a device is plugged in the pcie-root-port when VM kernel is
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booting, the kernel may wrongly disable the device.
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This bug was brought in by two patches of the linux kernel:
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https://patchwork.kernel.org/patch/10575355/
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https://patchwork.kernel.org/patch/10766219/
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VM runtime like kata uses this feature to boot microVM,
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so we must fix it up. We hack into the pcie native hotplug
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patch so that hotplug/unplug will work under this circumstance.
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Signed-off-by: Ying Fang <fangying1@huawei.com>
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Signed-off-by: Yan Wang <wangyan122@huawei.com>
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---
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hw/core/machine.c | 2 ++
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hw/pci-bridge/gen_pcie_root_port.c | 2 ++
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hw/pci/pcie.c | 13 ++++++++++++-
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include/hw/pci/pcie_port.h | 3 +++
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4 files changed, 19 insertions(+), 1 deletion(-)
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diff --git a/hw/core/machine.c b/hw/core/machine.c
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index 0c17398141..965682619b 100644
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--- a/hw/core/machine.c
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+++ b/hw/core/machine.c
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@@ -160,6 +160,8 @@ const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
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GlobalProperty hw_compat_3_1[] = {
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{ "pcie-root-port", "x-speed", "2_5" },
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{ "pcie-root-port", "x-width", "1" },
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+ { "pcie-root-port", "fast-plug", "0" },
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+ { "pcie-root-port", "fast-unplug", "0" },
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{ "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
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{ "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
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{ "tpm-crb", "ppi", "false" },
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diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
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index 1ce4e7beba..1e1ab5bb19 100644
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--- a/hw/pci-bridge/gen_pcie_root_port.c
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+++ b/hw/pci-bridge/gen_pcie_root_port.c
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@@ -145,6 +145,8 @@ static Property gen_rp_props[] = {
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speed, PCIE_LINK_SPEED_16),
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DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
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width, PCIE_LINK_WIDTH_32),
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+ DEFINE_PROP_UINT8("fast-plug", PCIESlot, fast_plug, 0),
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+ DEFINE_PROP_UINT8("fast-unplug", PCIESlot, fast_unplug, 0),
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DEFINE_PROP_END_OF_LIST()
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};
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diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
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index dccf204451..04fbd794a8 100644
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--- a/hw/pci/pcie.c
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+++ b/hw/pci/pcie.c
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@@ -555,6 +555,7 @@ void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
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uint8_t *exp_cap = hotplug_pdev->config + hotplug_pdev->exp.exp_cap;
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uint32_t sltcap = pci_get_word(exp_cap + PCI_EXP_SLTCAP);
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uint16_t sltctl = pci_get_word(exp_cap + PCI_EXP_SLTCTL);
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+ PCIESlot *s = PCIE_SLOT(hotplug_pdev);
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/* Check if hot-unplug is disabled on the slot */
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if ((sltcap & PCI_EXP_SLTCAP_HPC) == 0) {
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@@ -600,7 +601,17 @@ void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
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return;
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}
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- pcie_cap_slot_push_attention_button(hotplug_pdev);
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+ if ((pci_dev->cap_present & QEMU_PCIE_LNKSTA_DLLLA) && s->fast_plug) {
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+ pci_word_test_and_clear_mask(pci_dev->config + pci_dev->exp.exp_cap + PCI_EXP_LNKSTA,
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+ PCI_EXP_LNKSTA_DLLLA);
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+ }
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+
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+ if (s->fast_unplug) {
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+ pcie_cap_slot_event(hotplug_pdev,
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+ PCI_EXP_HP_EV_PDC | PCI_EXP_HP_EV_ABP);
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+ } else {
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+ pcie_cap_slot_push_attention_button(hotplug_pdev);
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+ }
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}
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/* pci express slot for pci express root/downstream port
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diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
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index 90e6cf45b8..7148a0959b 100644
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--- a/include/hw/pci/pcie_port.h
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+++ b/include/hw/pci/pcie_port.h
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@@ -56,6 +56,9 @@ struct PCIESlot {
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uint8_t chassis;
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uint16_t slot;
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+ uint8_t fast_plug;
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+ uint8_t fast_unplug;
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+
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PCIExpLinkSpeed speed;
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PCIExpLinkWidth width;
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--
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2.27.0
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