qemu/Revert-hw-arm-smmuv3-Pass-stage-1-configurations-to-.patch

From 9682b8cd2454c00fbb4c4f7eb3e959187d9e6f1c Mon Sep 17 00:00:00 2001
From: Kunkun Jiang <jiangkunkun@huawei.com>
Date: Fri, 18 Nov 2022 15:22:31 +0800
Subject: [PATCH 13/36] Revert "hw/arm/smmuv3: Pass stage 1 configurations to
 the host"

This reverts commit 2e5929ec2a35a7a227dc7ba70a557a84993a366d.

Signed-off-by: Kunkun Jiang <jiangkunkun@huawei.com>
---
 hw/arm/smmu-internal.h |  1 -
 hw/arm/smmuv3.c        | 71 ++++++------------------------------------
 hw/arm/trace-events    |  1 -
 3 files changed, 9 insertions(+), 64 deletions(-)

diff --git a/hw/arm/smmu-internal.h b/hw/arm/smmu-internal.h
index 5ef8c598c6..2d75b31953 100644
--- a/hw/arm/smmu-internal.h
+++ b/hw/arm/smmu-internal.h
@@ -105,7 +105,6 @@ typedef struct SMMUIOTLBPageInvInfo {
 } SMMUIOTLBPageInvInfo;
 
 typedef struct SMMUSIDRange {
-    SMMUState *state;
     uint32_t start;
     uint32_t end;
 } SMMUSIDRange;
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 514ce9d57d..cceb3794d4 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -16,10 +16,6 @@
  * with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
-#ifdef __linux__
-#include "linux/iommu.h"
-#endif
-
 #include "qemu/osdep.h"
 #include "qemu/bitops.h"
 #include "hw/irq.h"
@@ -936,61 +932,6 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
     }
 }
 
-static void smmuv3_notify_config_change(SMMUState *bs, uint32_t sid)
-{
-#ifdef __linux__
-    IOMMUMemoryRegion *mr = smmu_iommu_mr(bs, sid);
-    SMMUEventInfo event = {.type = SMMU_EVT_NONE, .sid = sid,
-                           .inval_ste_allowed = true};
-    IOMMUConfig iommu_config = {};
-    SMMUTransCfg *cfg;
-    SMMUDevice *sdev;
-
-    if (!mr) {
-        return;
-    }
-
-    sdev = container_of(mr, SMMUDevice, iommu);
-
-    /* flush QEMU config cache */
-    smmuv3_flush_config(sdev);
-
-    if (!pci_device_is_pasid_ops_set(sdev->bus, sdev->devfn)) {
-        return;
-    }
-
-    cfg = smmuv3_get_config(sdev, &event);
-
-    if (!cfg) {
-        return;
-    }
-
-    iommu_config.pasid_cfg.argsz = sizeof(struct iommu_pasid_table_config);
-    iommu_config.pasid_cfg.version = PASID_TABLE_CFG_VERSION_1;
-    iommu_config.pasid_cfg.format = IOMMU_PASID_FORMAT_SMMUV3;
-    iommu_config.pasid_cfg.base_ptr = cfg->s1ctxptr;
-    iommu_config.pasid_cfg.pasid_bits = 0;
-    iommu_config.pasid_cfg.vendor_data.smmuv3.version = PASID_TABLE_SMMUV3_CFG_VERSION_1;
-
-    if (cfg->disabled || cfg->bypassed) {
-        iommu_config.pasid_cfg.config = IOMMU_PASID_CONFIG_BYPASS;
-    } else if (cfg->aborted) {
-        iommu_config.pasid_cfg.config = IOMMU_PASID_CONFIG_ABORT;
-    } else {
-        iommu_config.pasid_cfg.config = IOMMU_PASID_CONFIG_TRANSLATE;
-    }
-
-    trace_smmuv3_notify_config_change(mr->parent_obj.name,
-                                      iommu_config.pasid_cfg.config,
-                                      iommu_config.pasid_cfg.base_ptr);
-
-    if (pci_device_set_pasid_table(sdev->bus, sdev->devfn, &iommu_config)) {
-        error_report("Failed to pass PASID table to host for iommu mr %s (%m)",
-                     mr->parent_obj.name);
-    }
-#endif
-}
-
 static gboolean
 smmuv3_invalidate_ste(gpointer key, gpointer value, gpointer user_data)
 {
@@ -1001,7 +942,6 @@ smmuv3_invalidate_ste(gpointer key, gpointer value, gpointer user_data)
     if (sid < sid_range->start || sid > sid_range->end) {
         return false;
     }
-    smmuv3_notify_config_change(sid_range->state, sid);
     trace_smmuv3_config_cache_inv(sid);
     return true;
 }
@@ -1072,14 +1012,22 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
         case SMMU_CMD_CFGI_STE:
         {
             uint32_t sid = CMD_SID(&cmd);
+            IOMMUMemoryRegion *mr = smmu_iommu_mr(bs, sid);
+            SMMUDevice *sdev;
 
             if (CMD_SSEC(&cmd)) {
                 cmd_error = SMMU_CERROR_ILL;
                 break;
             }
 
+            if (!mr) {
+                break;
+            }
+
             trace_smmuv3_cmdq_cfgi_ste(sid);
-            smmuv3_notify_config_change(bs, sid);
+            sdev = container_of(mr, SMMUDevice, iommu);
+            smmuv3_flush_config(sdev);
+
             break;
         }
         case SMMU_CMD_CFGI_STE_RANGE: /* same as SMMU_CMD_CFGI_ALL */
@@ -1094,7 +1042,6 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
             }
 
             mask = (1ULL << (range + 1)) - 1;
-            sid_range.state = bs;
             sid_range.start = sid & ~mask;
             sid_range.end = sid_range.start + mask;
 
diff --git a/hw/arm/trace-events b/hw/arm/trace-events
index d9851d663e..1447ad5a90 100644
--- a/hw/arm/trace-events
+++ b/hw/arm/trace-events
@@ -53,5 +53,4 @@ smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
 smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
 smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
 smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint64_t iova, uint8_t tg, uint64_t num_pages) "iommu mr=%s asid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64
-smmuv3_notify_config_change(const char *name, uint8_t config, uint64_t s1ctxptr) "iommu mr=%s config=%d s1ctxptr=0x%"PRIx64
 
-- 
2.27.0