43 lines
1.6 KiB
Diff
43 lines
1.6 KiB
Diff
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From 26ddb3428182503b28ac87cad7543eb241a9d353 Mon Sep 17 00:00:00 2001
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From: Xiaoyao Li <xiaoyao.li@intel.com>
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Date: Mon, 15 Jan 2024 04:13:25 -0500
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Subject: [PATCH] i386/cpu: Mask with XCR0/XSS mask for FEAT_XSAVE_XCR0_HI and
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FEAT_XSAVE_XSS_HI leafs
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commit a11a365159b944e05be76f3ec3b98c8b38cb70fd upstream.
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The value of FEAT_XSAVE_XCR0_HI leaf and FEAT_XSAVE_XSS_HI leaf also
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need to be masked by XCR0 and XSS mask respectively, to make it
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logically correct.
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Fixes: 301e90675c3f ("target/i386: Enable support for XSAVES based features")
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Signed-off-by: Xiaoyao Li <xiaoyao.li@intel.com>
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Reviewed-by: Yang Weijiang <weijiang.yang@intel.com>
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Message-ID: <20240115091325.1904229-3-xiaoyao.li@intel.com>
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Cc: qemu-stable@nongnu.org
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Jason Zeng <jason.zeng@intel.com>
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---
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target/i386/cpu.c | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 8b9ef218d3..a66e5a357b 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -6947,9 +6947,9 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu)
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}
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env->features[FEAT_XSAVE_XCR0_LO] = mask & CPUID_XSTATE_XCR0_MASK;
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- env->features[FEAT_XSAVE_XCR0_HI] = mask >> 32;
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+ env->features[FEAT_XSAVE_XCR0_HI] = (mask & CPUID_XSTATE_XCR0_MASK) >> 32;
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env->features[FEAT_XSAVE_XSS_LO] = mask & CPUID_XSTATE_XSS_MASK;
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- env->features[FEAT_XSAVE_XSS_HI] = mask >> 32;
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+ env->features[FEAT_XSAVE_XSS_HI] = (mask & CPUID_XSTATE_XSS_MASK) >> 32;
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}
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/***** Steps involved on loading and filtering CPUID data
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--
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2.27.0
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