qemu/arm-cpu-Some-fixes-for-arm_cpu_unrealizefn.patch

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QEMU update to version 8.2.0-6: - coro: support live patch for libcare - tests/acpi: Update expected ACPI tables for vcpu hotplug(update BinDir) - arm/virt: Require mc->has_hotpluggable_cpus for cold-plugged vcpu - arm/virt: Consider has_ged when set mc->has_hotpluggable_cpus - arm/virt-acpi: Require possible_cpu_arch_ids for build_cpus_aml() - acpi/ged: Remove cpuhp field of ged - acpi/ged: Init cpu hotplug only when machine support it - intc/gicv3: Fixes for vcpu hotplug - arm/kvm: Set psci smccc filter only with vcpu hotplug - accel/kvm: Use correct id for parked vcpu - arm/virt: Fix adjudgement of core_id for vcpu hotplugged - arm/virt.c: Convey local_err when set psci-conduit - system/cpus: Fix resume_all_vcpus() under vCPU hotplug condition - system/cpus: Fix pause_all_vcpus() under concurrent environment - acpi/cpu: Fix cpu_hotplug_hw_init() - arm/cpu: Some fixes for arm_cpu_unrealizefn() - system/physmem: Fix possible double free when destroy cpu as - hw/arm/virt: Expose cold-booted CPUs as MADT GICC Enabled - tcg/mttcg: enable threads to unregister in tcg_ctxs[] - hw/arm: Support hotplug capability check using _OSC method - target/arm/kvm,tcg: Register/Handle SMCCC hypercall exits to VMM/Qemu - target/arm/kvm: Write CPU state back to KVM on reset - target/arm: Add support of *unrealize* ARMCPU during vCPU Hot-unplug - physmem,gdbstub: Common helping funcs/changes to *unrealize* vCPU - hw/arm: Changes required for reset and to support next boot - arm/virt: Update the guest(via GED) about CPU hot-(un)plug events - hw/intc/arm-gicv3*: Changes required to (re)init the vCPU register info - hw/arm,gicv3: Changes to update GIC with vCPU hot-plug notification - arm/virt: Changes to (un)wire GICC<->vCPU IRQs during hot-(un)plug - arm/virt: Add/update basic hot-(un)plug framework - hw/acpi: Update ACPI GED framework to support vCPU Hotplug - arm/virt: Release objects for *disabled* possible vCPUs after init - hw/acpi: Make _MAT method optional - hw/arm: MADT Tbl change to size the guest with possible vCPUs - hw/acpi: Update GED _EVT method AML with cpu scan - hw/acpi: ACPI/AML Changes to reflect the correct _STA.{PRES,ENA} Bits to Guest - arm/virt: Make ARM vCPU *present* status ACPI *persistent* - arm/virt/acpi: Build CPUs AML with CPU Hotplug support - tests/acpi/bios-tables-test: Allow changes to virt/DSDT file - acpi/cpu: Add cpu_cppc building support - arm/virt/acpi: Factor out CPPC building from DSDT CPU aml - hw/acpi: Update CPUs AML with cpu-(ctrl)dev change - arm/virt: Create GED dev before *disabled* CPU Objs are destroyed - arm/virt: Add cpu hotplug events to GED during creation - hw/acpi: Init GED framework with cpu hotplug events - hw/acpi: Use qemu_present_cpu() API in ACPI CPU hotplug init - hw/acpi: Add ACPI CPU hotplug init stub - arm/acpi: Enable ACPI support for vcpu hotplug - hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file - arm/virt: Init PMU at host for all possible vcpus - arm/virt,gicv3: Changes to pre-size GIC with possible vcpus @machine init - arm/virt,kvm: Pre-create disabled possible vCPUs @machine init - accel/kvm: Extract common KVM vCPU {creation,parking} code - arm/virt,target/arm: Machine init time change common to vCPU {cold|hot}-plug - hw/arm/virt: Move setting of common CPU properties in a function - cpus-common: Add common CPU utility for possible vCPUs - arm/virt,target/arm: Add new ARMCPU {socket,cluster,core,thread}-id property Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com>
2024-04-10 20:59:57 +08:00
From b394996c99c0af0de870a5d79fff69f01d504b0c Mon Sep 17 00:00:00 2001
From: Keqian Zhu <zhukeqian1@huawei.com>
Date: Tue, 26 Mar 2024 14:47:07 +0800
Subject: [PATCH] arm/cpu: Some fixes for arm_cpu_unrealizefn()
Some minor fixes for arm_cpu_unrealizefn().
Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
---
target/arm/cpu.c | 33 +++++++++++++++++++++------------
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 501f88eb2f..9dd61c10ea 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2418,6 +2418,7 @@ static void arm_cpu_unrealizefn(DeviceState *dev)
CPUState *cs = CPU(dev);
bool has_secure;
+#ifndef CONFIG_USER_ONLY
has_secure = cpu->has_el3 || arm_feature(env, ARM_FEATURE_M_SECURITY);
/* rock 'n' un-roll, whatever happened in the arm_cpu_realizefn cleanly */
@@ -2433,30 +2434,38 @@ static void arm_cpu_unrealizefn(DeviceState *dev)
if (has_secure) {
cpu_address_space_destroy(cs, ARMASIdx_S);
}
+#endif
destroy_cpreg_list(cpu);
arm_cpu_unregister_gdb_regs(cpu);
unregister_cp_regs_for_features(cpu);
+#ifndef CONFIG_USER_ONLY
+ if (tcg_enabled() && cpu_isar_feature(aa64_rme, cpu)) {
+ arm_unregister_el_change_hooks(cpu);
+ }
+#endif
+
if (cpu->sau_sregion && arm_feature(env, ARM_FEATURE_M_SECURITY)) {
g_free(env->sau.rbar);
g_free(env->sau.rlar);
}
if (arm_feature(env, ARM_FEATURE_PMSA) &&
- arm_feature(env, ARM_FEATURE_V7) &&
- cpu->pmsav7_dregion) {
- if (arm_feature(env, ARM_FEATURE_V8)) {
- g_free(env->pmsav8.rbar[M_REG_NS]);
- g_free(env->pmsav8.rlar[M_REG_NS]);
- if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
- g_free(env->pmsav8.rbar[M_REG_S]);
- g_free(env->pmsav8.rlar[M_REG_S]);
+ arm_feature(env, ARM_FEATURE_V7)) {
+ if (cpu->pmsav7_dregion) {
+ if (arm_feature(env, ARM_FEATURE_V8)) {
+ g_free(env->pmsav8.rbar[M_REG_NS]);
+ g_free(env->pmsav8.rlar[M_REG_NS]);
+ if (arm_feature(env, ARM_FEATURE_M_SECURITY)) {
+ g_free(env->pmsav8.rbar[M_REG_S]);
+ g_free(env->pmsav8.rlar[M_REG_S]);
+ }
+ } else {
+ g_free(env->pmsav7.drbar);
+ g_free(env->pmsav7.drsr);
+ g_free(env->pmsav7.dracr);
}
- } else {
- g_free(env->pmsav7.drbar);
- g_free(env->pmsav7.drsr);
- g_free(env->pmsav7.dracr);
}
if (cpu->pmsav8r_hdregion) {
g_free(env->pmsav8.hprbar);
--
2.27.0