88 lines
3.4 KiB
Diff
88 lines
3.4 KiB
Diff
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From 74ef18c90684f0ae18aef071b9e11a5e8796177b Mon Sep 17 00:00:00 2001
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From: alexchen <alex.chen@huawei.com>
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Date: Tue, 8 Sep 2020 11:17:20 +0000
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Subject: [PATCH] hw/block/nvme: fix pin-based interrupt behavior
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First, since the device only supports MSI-X or pin-based interrupt, if
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MSI-X is not enabled, it should not accept interrupt vectors different
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from 0 when creating completion queues.
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Secondly, the irq_status NvmeCtrl member is meant to be compared to the
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INTMS register, so it should only be 32 bits wide. And it is really only
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useful when used with multi-message MSI.
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Third, since we do not force a 1-to-1 correspondence between cqid and
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interrupt vector, the irq_status register should not have bits set
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according to cqid, but according to the associated interrupt vector.
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Fix these issues, but keep irq_status available so we can easily support
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multi-message MSI down the line.
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Fixes: 5e9aa92eb1a5 ("hw/block: Fix pin-based interrupt behaviour of NVMe")
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Cc: "Michael S. Tsirkin" <mst@redhat.com>
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Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
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Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
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Reviewed-by: Keith Busch <kbusch@kernel.org>
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Message-Id: <20200609190333.59390-8-its@irrelevant.dk>
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Signed-off-by: Kevin Wolf <kwolf@redhat.com>
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Signed-off-by: BiaoXiang Ye <yebiaoxiang@huawei.com>
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Signed-off-by: Zhenyu Ye <yezhenyu2@huawei.com>
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---
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hw/block/nvme.c | 12 ++++++++----
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hw/block/nvme.h | 2 +-
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2 files changed, 9 insertions(+), 5 deletions(-)
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diff --git a/hw/block/nvme.c b/hw/block/nvme.c
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index 36d6a8bb..e35c2e10 100644
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--- a/hw/block/nvme.c
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+++ b/hw/block/nvme.c
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@@ -115,8 +115,8 @@ static void nvme_irq_assert(NvmeCtrl *n, NvmeCQueue *cq)
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msix_notify(&(n->parent_obj), cq->vector);
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} else {
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trace_nvme_irq_pin();
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- assert(cq->cqid < 64);
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- n->irq_status |= 1 << cq->cqid;
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+ assert(cq->vector < 32);
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+ n->irq_status |= 1 << cq->vector;
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nvme_irq_check(n);
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}
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} else {
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@@ -130,8 +130,8 @@ static void nvme_irq_deassert(NvmeCtrl *n, NvmeCQueue *cq)
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if (msix_enabled(&(n->parent_obj))) {
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return;
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} else {
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- assert(cq->cqid < 64);
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- n->irq_status &= ~(1 << cq->cqid);
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+ assert(cq->vector < 32);
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+ n->irq_status &= ~(1 << cq->vector);
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nvme_irq_check(n);
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}
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}
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@@ -630,6 +630,10 @@ static uint16_t nvme_create_cq(NvmeCtrl *n, NvmeCmd *cmd)
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trace_nvme_err_invalid_create_cq_addr(prp1);
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return NVME_INVALID_FIELD | NVME_DNR;
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}
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+ if (unlikely(!msix_enabled(&n->parent_obj) && vector)) {
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+ trace_nvme_err_invalid_create_cq_vector(vector);
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+ return NVME_INVALID_IRQ_VECTOR | NVME_DNR;
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+ }
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if (unlikely(vector > n->num_queues)) {
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trace_nvme_err_invalid_create_cq_vector(vector);
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return NVME_INVALID_IRQ_VECTOR | NVME_DNR;
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diff --git a/hw/block/nvme.h b/hw/block/nvme.h
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index 557194ee..f4c1ff91 100644
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--- a/hw/block/nvme.h
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+++ b/hw/block/nvme.h
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@@ -78,7 +78,7 @@ typedef struct NvmeCtrl {
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uint32_t cmbsz;
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uint32_t cmbloc;
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uint8_t *cmbuf;
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- uint64_t irq_status;
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+ uint32_t irq_status;
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uint64_t host_timestamp; /* Timestamp sent by the host */
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uint64_t timestamp_set_qemu_clock_ms; /* QEMU clock time */
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--
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2.23.0
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