qemu/target-loongarch-Support-QMP-dump-guest-memory.patch

238 lines
7.7 KiB
Diff
Raw Normal View History

QEMU update to version 8.2.0-27: - fix compile error on loongarch - hw/loongarch: fix cpu hotplug reset - hw/loongarch/boot: Use warn_report when no kernel filename - hw/loongarch: clean code - hw/loongarch: Add KVM pch msi device support - hw/loongarch: Add KVM pch pic device support - hw/loongarch: Add KVM extioi device support - hw/loongarch: Add KVM IPI device support - hw/loongarch/virt: Update the ACPI table for hotplug cpu - hw/loongarch/virt: Add basic CPU plug support - hw/loongarch/virt: Add CPU topology support - accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic - gdbstub: Add helper function to unregister GDB register space - physmem: Add helper function to destroy CPU AddressSpace - hw/acpi: Update CPUs AML with cpu-(ctrl)dev change - hw/acpi: Update ACPI GED framework to support vCPU Hotplug - hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file - accel/kvm: Extract common KVM vCPU {creation,parking} code - target/loongarch: Add steal time support on migration - linux-headers: loongarch: Add kvm_para.h and unistd_64.h - target/loongarch/kvm: Implement LoongArch PMU extension - target/loongarch: Implement lbt registers save/restore function - target/loongarch: Add loongson binary translation feature - sync loongarch linux-headers - target/loongarch: Avoid bits shift exceeding width of bool type - target/loongarch: Use explicit little-endian LD/ST API - target/loongarch: fix -Werror=maybe-uninitialized false-positive - target/loongarch: Support QMP dump-guest-memory - target/loongarch/kvm: Add vCPU reset function - target/loongarch: Add compatible support about VM reboot - target/loongarch: Fix cpu_reset set wrong CSR_CRMD - target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values - target/loongarch: Remove avail_64 in trans_srai_w() and simplify it - target/loongarch/kvm: Add software breakpoint support - target/loongarch: Add loongarch vector property unconditionally - target/loongarch/kvm: Fix VM recovery from disk failures - target/loongarch: Put cpucfg operation before CSR register - target/loongarch: Add TCG macro in structure CPUArchState - hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location - hw/loongarch/virt: Add FDT table support with acpi ged pm register - hw/loongarch/virt: Add description for virt machine type - hw/loongarch: Add acpi SPCR table support - hw/loongarch: virt: pass random seed to fdt - hw/loongarch: virt: support up to 4 serial ports - hw/loongarch: Remove default enable with VIRTIO_VGA device - hw/loongarch: Fix length for lowram in ACPI SRAT - hw/loongarch/virt: Remove unused assignment - hw/loongarch: Change the tpm support by default - hw/loongarch/boot.c: fix out-of-bound reading - hw/loongarch/virt: Use MemTxAttrs interface for misc ops - tests/libqos: Add loongarch virt machine node - hw/loongarch: Remove minimum and default memory size - hw/loongarch: Refine system dram memory region - hw/loongarch: Refine fwcfg memory map - hw/loongarch: Refine fadt memory table for numa memory - hw/loongarch: Refine acpi srat table for numa memory - hw/loongarch: Add VM mode in IOCSR feature register in kvm mode - hw/loongarch: Refine default numa id calculation - hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState - hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE - hw/loongarch: move memory map to boot.c - loongarch: switch boards to "default y" - hw/loongarch: Add cells missing from rtc node - hw/loongarch: Add cells missing from uart node - hw/loongarch: fdt remove unused irqchip node - hw/loongarch: fdt adds pcie irq_map node - hw/loongarch: fdt adds pch_msi Controller - hw/loongarch: fdt adds pch_pic Controller - hw/loongarch: fdt adds Extend I/O Interrupt Controller - hw/loongarch: fdt adds cpu interrupt controller node - hw/loongarch: Init efi_fdt table - hw/loongarch: Init efi_initrd table - hw/loongarch: Init efi_boot_memmap table - hw/loongarch: Init efi_system_table - hw/loongarch: Add init_cmdline - hw/loongarch: Add slave cpu boot_code - hw/loongarch: Add load initrd - hw/loongarch: Move boot functions to boot.c Signed-off-by: Xianglai Li <lixianglai@loongson.cn> (cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
2024-12-13 19:50:22 +08:00
From 2f19b259a16985ce515727c819c3a7eb4f41e6d0 Mon Sep 17 00:00:00 2001
From: Bibo Mao <maobibo@loongson.cn>
Date: Thu, 22 Aug 2024 14:52:45 +0800
Subject: [PATCH 52/78] target/loongarch: Support QMP dump-guest-memory
Add the support needed for creating prstatus elf notes. This allows
us to use QMP dump-guest-memory.
Now ELF notes of LoongArch only supports general elf notes, LSX and
LASX is not supported, since it is mainly used to dump guest memory.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240822065245.2286214-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
---
target/loongarch/arch_dump.c | 167 +++++++++++++++++++++++++++++++++++
target/loongarch/cpu.c | 1 +
target/loongarch/internals.h | 2 +
target/loongarch/meson.build | 1 +
4 files changed, 171 insertions(+)
create mode 100644 target/loongarch/arch_dump.c
diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c
new file mode 100644
index 0000000000..4986db970e
--- /dev/null
+++ b/target/loongarch/arch_dump.c
@@ -0,0 +1,167 @@
+/*
+ * Support for writing ELF notes for LoongArch architectures
+ *
+ * Copyright (c) 2023 Loongarch Technology
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "elf.h"
+#include "sysemu/dump.h"
+#include "internals.h"
+
+/* struct user_pt_regs from arch/loongarch/include/uapi/asm/ptrace.h */
+struct loongarch_user_regs {
+ uint64_t gpr[32];
+ uint64_t pad1[1];
+ /* Special CSR registers. */
+ uint64_t csr_era;
+ uint64_t csr_badv;
+ uint64_t pad2[10];
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_user_regs) != 360);
+
+/* struct elf_prstatus from include/uapi/linux/elfcore.h */
+struct loongarch_elf_prstatus {
+ char pad1[32]; /* 32 == offsetof(struct elf_prstatus, pr_pid) */
+ uint32_t pr_pid;
+ /*
+ * 76 == offsetof(struct elf_prstatus, pr_reg) -
+ * offsetof(struct elf_prstatus, pr_ppid)
+ */
+ char pad2[76];
+ struct loongarch_user_regs pr_reg;
+ uint32_t pr_fpvalid;
+ char pad3[4];
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_elf_prstatus) != 480);
+
+/* struct user_fp_state from arch/loongarch/include/uapi/asm/ptrace.h */
+struct loongarch_fpu_struct {
+ uint64_t fpr[32];
+ uint64_t fcc;
+ unsigned int fcsr;
+} QEMU_PACKED;
+
+QEMU_BUILD_BUG_ON(sizeof(struct loongarch_fpu_struct) != 268);
+
+struct loongarch_note {
+ Elf64_Nhdr hdr;
+ char name[8]; /* align_up(sizeof("CORE"), 4) */
+ union {
+ struct loongarch_elf_prstatus prstatus;
+ struct loongarch_fpu_struct fpu;
+ };
+} QEMU_PACKED;
+
+#define LOONGARCH_NOTE_HEADER_SIZE offsetof(struct loongarch_note, prstatus)
+#define LOONGARCH_PRSTATUS_NOTE_SIZE \
+ (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_elf_prstatus))
+#define LOONGARCH_PRFPREG_NOTE_SIZE \
+ (LOONGARCH_NOTE_HEADER_SIZE + sizeof(struct loongarch_fpu_struct))
+
+static void loongarch_note_init(struct loongarch_note *note, DumpState *s,
+ const char *name, Elf64_Word namesz,
+ Elf64_Word type, Elf64_Word descsz)
+{
+ memset(note, 0, sizeof(*note));
+
+ note->hdr.n_namesz = cpu_to_dump32(s, namesz);
+ note->hdr.n_descsz = cpu_to_dump32(s, descsz);
+ note->hdr.n_type = cpu_to_dump32(s, type);
+
+ memcpy(note->name, name, namesz);
+}
+
+static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f,
+ CPULoongArchState *env, int cpuid,
+ DumpState *s)
+{
+ struct loongarch_note note;
+ int ret, i;
+
+ loongarch_note_init(&note, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu));
+ note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0);
+
+ for (i = 0; i < 8; i++) {
+ note.fpu.fcc |= env->cf[i] << (8 * i);
+ }
+ note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc);
+
+ for (i = 0; i < 32; ++i) {
+ note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]);
+ }
+
+ ret = f(&note, LOONGARCH_PRFPREG_NOTE_SIZE, s);
+ if (ret < 0) {
+ return -1;
+ }
+
+ return 0;
+}
+
+int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
+ int cpuid, DumpState *s)
+{
+ struct loongarch_note note;
+ CPULoongArchState *env = &LOONGARCH_CPU(cs)->env;
+ int ret, i;
+
+ loongarch_note_init(&note, s, "CORE", 5, NT_PRSTATUS,
+ sizeof(note.prstatus));
+ note.prstatus.pr_pid = cpu_to_dump32(s, cpuid);
+ note.prstatus.pr_fpvalid = cpu_to_dump32(s, 1);
+
+ for (i = 0; i < 32; ++i) {
+ note.prstatus.pr_reg.gpr[i] = cpu_to_dump64(s, env->gpr[i]);
+ }
+ note.prstatus.pr_reg.csr_era = cpu_to_dump64(s, env->CSR_ERA);
+ note.prstatus.pr_reg.csr_badv = cpu_to_dump64(s, env->CSR_BADV);
+ ret = f(&note, LOONGARCH_PRSTATUS_NOTE_SIZE, s);
+ if (ret < 0) {
+ return -1;
+ }
+
+ ret = loongarch_write_elf64_fprpreg(f, env, cpuid, s);
+ if (ret < 0) {
+ return -1;
+ }
+
+ return ret;
+}
+
+int cpu_get_dump_info(ArchDumpInfo *info,
+ const GuestPhysBlockList *guest_phys_blocks)
+{
+ info->d_machine = EM_LOONGARCH;
+ info->d_endian = ELFDATA2LSB;
+ info->d_class = ELFCLASS64;
+
+ return 0;
+}
+
+ssize_t cpu_get_note_size(int class, int machine, int nr_cpus)
+{
+ size_t note_size = 0;
+
+ if (class == ELFCLASS64) {
+ note_size = LOONGARCH_PRSTATUS_NOTE_SIZE + LOONGARCH_PRFPREG_NOTE_SIZE;
+ }
+
+ return note_size * nr_cpus;
+}
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 63d1f65608..d6a13de901 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -861,6 +861,7 @@ static struct TCGCPUOps loongarch_tcg_ops = {
#include "hw/core/sysemu-cpu-ops.h"
static const struct SysemuCPUOps loongarch_sysemu_ops = {
+ .write_elf64_note = loongarch_cpu_write_elf64_note,
.get_phys_page_debug = loongarch_cpu_get_phys_page_debug,
};
diff --git a/target/loongarch/internals.h b/target/loongarch/internals.h
index 944153b180..1a02427627 100644
--- a/target/loongarch/internals.h
+++ b/target/loongarch/internals.h
@@ -72,5 +72,7 @@ void write_fcc(CPULoongArchState *env, uint64_t val);
int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
+int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
+ int cpuid, DumpState *s);
#endif
diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
index e002e9aaf6..7817318287 100644
--- a/target/loongarch/meson.build
+++ b/target/loongarch/meson.build
@@ -8,6 +8,7 @@ loongarch_ss.add(files(
loongarch_system_ss = ss.source_set()
loongarch_system_ss.add(files(
+ 'arch_dump.c',
'cpu_helper.c',
'loongarch-qmp-cmds.c',
'machine.c',
--
2.39.1