42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
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From c1f1346eea8da6552e085aa13630bbf5227db00f Mon Sep 17 00:00:00 2001
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From: qihao_yewu <qihao_yewu@cmss.chinamobile.com>
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Date: Mon, 7 Apr 2025 12:54:10 -0400
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Subject: [PATCH] hw/pci-host/designware: Fix ATU_UPPER_TARGET register access
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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cheery-pick from 04e99f9eb7920b0f0fcce65686c3bedf5e32a1f9
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Fix copy/paste error writing to the ATU_UPPER_TARGET
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register, we want to update the upper 32 bits.
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Cc: qemu-stable@nongnu.org
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Reported-by: Joey <jeundery@gmail.com>
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2861
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Fixes: d64e5eabc4c ("pci: Add support for Designware IP block")
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Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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Reviewed-by: Gustavo Romero <gustavo.romero@linaro.org>
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Message-Id: <20250331152041.74533-2-philmd@linaro.org>
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Signed-off-by: qihao_yewu <qihao_yewu@cmss.chinamobile.com>
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---
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hw/pci-host/designware.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c
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index f477f97847..004142709c 100644
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--- a/hw/pci-host/designware.c
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+++ b/hw/pci-host/designware.c
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@@ -360,7 +360,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address,
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case DESIGNWARE_PCIE_ATU_UPPER_TARGET:
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viewport->target &= 0x00000000FFFFFFFFULL;
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- viewport->target |= val;
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+ viewport->target |= (uint64_t)val << 32;
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break;
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case DESIGNWARE_PCIE_ATU_LIMIT:
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--
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2.41.0.windows.1
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