70 lines
2.5 KiB
Diff
70 lines
2.5 KiB
Diff
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From cd506fbf0d9a00aa0f25de1e7bd26ad4335c8257 Mon Sep 17 00:00:00 2001
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From: Song Gao <gaosong@loongson.cn>
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Date: Fri, 26 Apr 2024 17:15:44 +0800
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Subject: [PATCH 09/78] hw/loongarch: fdt adds cpu interrupt controller node
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fdt adds cpu interrupt controller node,
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we use 'loongson,cpu-interrupt-controller'.
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See:
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https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-cpu.c
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https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn
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Signed-off-by: Song Gao <gaosong@loongson.cn>
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Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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Message-Id: <20240426091551.2397867-11-gaosong@loongson.cn>
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Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
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---
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hw/loongarch/virt.c | 21 +++++++++++++++++++++
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1 file changed, 21 insertions(+)
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diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
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index 99a3dc8696..fdc4a5d708 100644
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--- a/hw/loongarch/virt.c
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+++ b/hw/loongarch/virt.c
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@@ -133,6 +133,23 @@ static void virt_flash_map(LoongArchMachineState *lams,
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virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem);
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}
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+static void fdt_add_cpuic_node(LoongArchMachineState *lams,
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+ uint32_t *cpuintc_phandle)
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+{
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+ MachineState *ms = MACHINE(lams);
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+ char *nodename;
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+
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+ *cpuintc_phandle = qemu_fdt_alloc_phandle(ms->fdt);
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+ nodename = g_strdup_printf("/cpuic");
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+ qemu_fdt_add_subnode(ms->fdt, nodename);
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+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle);
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+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
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+ "loongson,cpu-interrupt-controller");
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+ qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0);
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+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1);
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+ g_free(nodename);
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+}
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+
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static void fdt_add_flash_node(LoongArchMachineState *lams)
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{
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MachineState *ms = MACHINE(lams);
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@@ -557,6 +574,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
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CPULoongArchState *env;
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CPUState *cpu_state;
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int cpu, pin, i, start, num;
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+ uint32_t cpuintc_phandle;
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/*
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* The connection of interrupts:
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@@ -591,6 +609,9 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
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memory_region_add_subregion(&lams->system_iocsr, MAIL_SEND_ADDR,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1));
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+ /* Add cpu interrupt-controller */
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+ fdt_add_cpuic_node(lams, &cpuintc_phandle);
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+
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for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
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cpu_state = qemu_get_cpu(cpu);
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cpudev = DEVICE(cpu_state);
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--
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2.39.1
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