qemu/hw-loongarch-Add-KVM-pch-msi-device-support.patch

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QEMU update to version 8.2.0-27: - fix compile error on loongarch - hw/loongarch: fix cpu hotplug reset - hw/loongarch/boot: Use warn_report when no kernel filename - hw/loongarch: clean code - hw/loongarch: Add KVM pch msi device support - hw/loongarch: Add KVM pch pic device support - hw/loongarch: Add KVM extioi device support - hw/loongarch: Add KVM IPI device support - hw/loongarch/virt: Update the ACPI table for hotplug cpu - hw/loongarch/virt: Add basic CPU plug support - hw/loongarch/virt: Add CPU topology support - accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic - gdbstub: Add helper function to unregister GDB register space - physmem: Add helper function to destroy CPU AddressSpace - hw/acpi: Update CPUs AML with cpu-(ctrl)dev change - hw/acpi: Update ACPI GED framework to support vCPU Hotplug - hw/acpi: Move CPU ctrl-dev MMIO region len macro to common header file - accel/kvm: Extract common KVM vCPU {creation,parking} code - target/loongarch: Add steal time support on migration - linux-headers: loongarch: Add kvm_para.h and unistd_64.h - target/loongarch/kvm: Implement LoongArch PMU extension - target/loongarch: Implement lbt registers save/restore function - target/loongarch: Add loongson binary translation feature - sync loongarch linux-headers - target/loongarch: Avoid bits shift exceeding width of bool type - target/loongarch: Use explicit little-endian LD/ST API - target/loongarch: fix -Werror=maybe-uninitialized false-positive - target/loongarch: Support QMP dump-guest-memory - target/loongarch/kvm: Add vCPU reset function - target/loongarch: Add compatible support about VM reboot - target/loongarch: Fix cpu_reset set wrong CSR_CRMD - target/loongarch: Set CSR_PRCFG1 and CSR_PRCFG2 values - target/loongarch: Remove avail_64 in trans_srai_w() and simplify it - target/loongarch/kvm: Add software breakpoint support - target/loongarch: Add loongarch vector property unconditionally - target/loongarch/kvm: Fix VM recovery from disk failures - target/loongarch: Put cpucfg operation before CSR register - target/loongarch: Add TCG macro in structure CPUArchState - hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location - hw/loongarch/virt: Add FDT table support with acpi ged pm register - hw/loongarch/virt: Add description for virt machine type - hw/loongarch: Add acpi SPCR table support - hw/loongarch: virt: pass random seed to fdt - hw/loongarch: virt: support up to 4 serial ports - hw/loongarch: Remove default enable with VIRTIO_VGA device - hw/loongarch: Fix length for lowram in ACPI SRAT - hw/loongarch/virt: Remove unused assignment - hw/loongarch: Change the tpm support by default - hw/loongarch/boot.c: fix out-of-bound reading - hw/loongarch/virt: Use MemTxAttrs interface for misc ops - tests/libqos: Add loongarch virt machine node - hw/loongarch: Remove minimum and default memory size - hw/loongarch: Refine system dram memory region - hw/loongarch: Refine fwcfg memory map - hw/loongarch: Refine fadt memory table for numa memory - hw/loongarch: Refine acpi srat table for numa memory - hw/loongarch: Add VM mode in IOCSR feature register in kvm mode - hw/loongarch: Refine default numa id calculation - hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState - hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE - hw/loongarch: move memory map to boot.c - loongarch: switch boards to "default y" - hw/loongarch: Add cells missing from rtc node - hw/loongarch: Add cells missing from uart node - hw/loongarch: fdt remove unused irqchip node - hw/loongarch: fdt adds pcie irq_map node - hw/loongarch: fdt adds pch_msi Controller - hw/loongarch: fdt adds pch_pic Controller - hw/loongarch: fdt adds Extend I/O Interrupt Controller - hw/loongarch: fdt adds cpu interrupt controller node - hw/loongarch: Init efi_fdt table - hw/loongarch: Init efi_initrd table - hw/loongarch: Init efi_boot_memmap table - hw/loongarch: Init efi_system_table - hw/loongarch: Add init_cmdline - hw/loongarch: Add slave cpu boot_code - hw/loongarch: Add load initrd - hw/loongarch: Move boot functions to boot.c Signed-off-by: Xianglai Li <lixianglai@loongson.cn> (cherry picked from commit 04ca9e6c8ff19630116722240ae0136cea831c5c)
2024-12-13 19:50:22 +08:00
From 24bd774f8146247c7ac6071492f6016140a97267 Mon Sep 17 00:00:00 2001
From: gaosong <gaosong@loongson.cn>
Date: Sun, 8 Sep 2024 22:18:50 +0800
Subject: [PATCH 75/78] hw/loongarch: Add KVM pch msi device support
Added pch_msi interrupt controller handling
during kernel emulation of irq chip.
Signed-off-by: gaosong <gaosong@loongson.cn>
Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
---
hw/intc/loongarch_pch_msi.c | 39 ++++++++++++++++++++++-------
hw/loongarch/virt.c | 22 +++++++++-------
include/hw/intc/loongarch_pch_msi.h | 2 +-
3 files changed, 44 insertions(+), 19 deletions(-)
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
index ecf3ed0267..901c2c21be 100644
--- a/hw/intc/loongarch_pch_msi.c
+++ b/hw/intc/loongarch_pch_msi.c
@@ -14,6 +14,8 @@
#include "hw/misc/unimp.h"
#include "migration/vmstate.h"
#include "trace.h"
+#include "sysemu/kvm.h"
+#include "hw/loongarch/virt.h"
static uint64_t loongarch_msi_mem_read(void *opaque, hwaddr addr, unsigned size)
{
@@ -26,14 +28,24 @@ static void loongarch_msi_mem_write(void *opaque, hwaddr addr,
LoongArchPCHMSI *s = (LoongArchPCHMSI *)opaque;
int irq_num;
- /*
- * vector number is irq number from upper extioi intc
- * need subtract irq base to get msi vector offset
- */
- irq_num = (val & 0xff) - s->irq_base;
- trace_loongarch_msi_set_irq(irq_num);
- assert(irq_num < s->irq_num);
- qemu_set_irq(s->pch_msi_irq[irq_num], 1);
+ MSIMessage msg = {
+ .address = addr,
+ .data = val,
+ };
+
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ kvm_irqchip_send_msi(kvm_state, msg);
+ } else {
+ /*
+ * vector number is irq number from upper extioi intc
+ * need subtract irq base to get msi vector offset
+ */
+ irq_num = (val & 0xff) - s->irq_base;
+ trace_loongarch_msi_set_irq(irq_num);
+ assert(irq_num < s->irq_num);
+
+ qemu_set_irq(s->pch_msi_irq[irq_num], 1);
+ }
}
static const MemoryRegionOps loongarch_pch_msi_ops = {
@@ -46,7 +58,16 @@ static void pch_msi_irq_handler(void *opaque, int irq, int level)
{
LoongArchPCHMSI *s = LOONGARCH_PCH_MSI(opaque);
- qemu_set_irq(s->pch_msi_irq[irq], level);
+ MSIMessage msg = {
+ .address = 0,
+ .data = irq,
+ };
+
+ if (kvm_enabled() && kvm_irqchip_in_kernel()) {
+ kvm_irqchip_send_msi(kvm_state, msg);
+ } else {
+ qemu_set_irq(s->pch_msi_irq[irq], level);
+ }
}
static void loongarch_pch_msi_realize(DeviceState *dev, Error **errp)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 270dcfd38f..5b0468f6cb 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -928,22 +928,26 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms)
for (i = 0; i < num; i++) {
qdev_connect_gpio_out(DEVICE(d), i, qdev_get_gpio_in(extioi, i));
}
+ }
- pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
- start = num;
- num = EXTIOI_IRQS - start;
- qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
- qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
- d = SYS_BUS_DEVICE(pch_msi);
- sysbus_realize_and_unref(d, &error_fatal);
- sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
+ pch_msi = qdev_new(TYPE_LOONGARCH_PCH_MSI);
+ num = VIRT_PCH_PIC_IRQ_NUM;
+ start = num;
+ num = EXTIOI_IRQS - start;
+ qdev_prop_set_uint32(pch_msi, "msi_irq_base", start);
+ qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
+ d = SYS_BUS_DEVICE(pch_msi);
+ sysbus_realize_and_unref(d, &error_fatal);
+
+ if (!(kvm_enabled() && kvm_irqchip_in_kernel())) {
+ /* Connect pch_msi irqs to extioi */
for (i = 0; i < num; i++) {
- /* Connect pch_msi irqs to extioi */
qdev_connect_gpio_out(DEVICE(d), i,
qdev_get_gpio_in(extioi, i + start));
}
}
+ sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
virt_devices_init(pch_pic, lvms, &pch_pic_phandle, &pch_msi_phandle);
}
diff --git a/include/hw/intc/loongarch_pch_msi.h b/include/hw/intc/loongarch_pch_msi.h
index b8586fb3b6..fd4ea97a83 100644
--- a/include/hw/intc/loongarch_pch_msi.h
+++ b/include/hw/intc/loongarch_pch_msi.h
@@ -7,7 +7,7 @@
#include "hw/sysbus.h"
-#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
+#define TYPE_LOONGARCH_PCH_MSI "loongarch_pch_msi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHMSI, LOONGARCH_PCH_MSI)
/* MSI irq start from 32 to 255 */
--
2.39.1