51 lines
2.0 KiB
Diff
51 lines
2.0 KiB
Diff
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From 1b0d08faf1daaed39809ed1a3516eaa0f7d61534 Mon Sep 17 00:00:00 2001
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From: Peter Maydell <peter.maydell@linaro.org>
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Date: Wed, 31 Jul 2024 18:00:19 +0100
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Subject: [PATCH] hw/i386/amd_iommu: Don't leak memory in amdvi_update_iotlb()
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In amdvi_update_iotlb() we will only put a new entry in the hash
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table if to_cache.perm is not IOMMU_NONE. However we allocate the
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memory for the new AMDVIIOTLBEntry and for the hash table key
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regardless. This means that in the IOMMU_NONE case we will leak the
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memory we alloacted.
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Move the allocations into the if() to the point where we know we're
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going to add the item to the hash table.
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Cc: qemu-stable@nongnu.org
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2452
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Message-Id: <20240731170019.3590563-1-peter.maydell@linaro.org>
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Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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(cherry picked from commit 9a45b0761628cc59267b3283a85d15294464ac31)
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Signed-off-by: zhujun2 <zhujun2_yewu@cmss.chinamobile.com>
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---
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hw/i386/amd_iommu.c | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
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index 4203144da9..12742b1433 100644
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--- a/hw/i386/amd_iommu.c
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+++ b/hw/i386/amd_iommu.c
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@@ -346,12 +346,12 @@ static void amdvi_update_iotlb(AMDVIState *s, uint16_t devid,
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uint64_t gpa, IOMMUTLBEntry to_cache,
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uint16_t domid)
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{
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- AMDVIIOTLBEntry *entry = g_new(AMDVIIOTLBEntry, 1);
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- uint64_t *key = g_new(uint64_t, 1);
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- uint64_t gfn = gpa >> AMDVI_PAGE_SHIFT_4K;
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-
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/* don't cache erroneous translations */
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if (to_cache.perm != IOMMU_NONE) {
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+ AMDVIIOTLBEntry *entry = g_new(AMDVIIOTLBEntry, 1);
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+ uint64_t *key = g_new(uint64_t, 1);
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+ uint64_t gfn = gpa >> AMDVI_PAGE_SHIFT_4K;
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+
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trace_amdvi_cache_update(domid, PCI_BUS_NUM(devid), PCI_SLOT(devid),
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PCI_FUNC(devid), gpa, to_cache.translated_addr);
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--
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2.41.0.windows.1
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