qemu/target-loongarch-kvm-Enable-LSX-LASX-extension.patch

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QEMU update to version 8.2.0-3: - disable keyring option - loongarch: Change the UEFI loading mode to loongarch - target/loongarch: Fix qtest test-hmp error when KVM-only build - target/loongarch/kvm: Enable LSX/LASX extension - target/loongarch: Set cpuid CSR register only once with kvm mode - configure: Add linux header compile support for LoongArch - hw/intc/loongarch_extioi: Add vmstate post_load support - hw/intc/loongarch_extioi: Add dynamic cpu number support - hw/loongarch/virt: Set iocsr address space per-board rather than percpu - hw/intc/loongarch_ipi: Use MemTxAttrs interface for ipi ops - target/loongarch: Add loongarch kvm into meson build - target/loongarch: Implement set vcpu intr for kvm - target/loongarch: Restrict TCG-specific code - target/loongarch: Implement kvm_arch_handle_exit - target/loongarch: Implement kvm_arch_init_vcpu - target/loongarch: Implement kvm_arch_init function - target/loongarch: Implement kvm get/set registers - target/loongarch: Supplement vcpu env initial when vcpu reset - target/loongarch: Define some kvm_arch interfaces - linux-headers: Synchronize linux headers from linux v6.7.0-rc8 - linux-headers: Update to Linux v6.7-rc5 - target/loongarch: move translate modules to tcg/ - target/loongarch/meson: move gdbstub.c to loongarch.ss - target/loongarch: Add timer information dump support - hw/loongarch/virt: Align high memory base address with super page size Signed-off-by: Jiabo Feng <fengjiabo1@huawei.com> (cherry picked from commit b2263e41ffa3428f1d9f9ff6e214c8e3a19e06e8)
2024-03-27 16:40:00 +08:00
From 6e503b590e42ad7c522cf937b83e1f8f715dbd1a Mon Sep 17 00:00:00 2001
From: Song Gao <gaosong@loongson.cn>
Date: Mon, 22 Jan 2024 17:02:06 +0800
Subject: [PATCH] target/loongarch/kvm: Enable LSX/LASX extension
The kernel had already support LSX and LASX [1],
but QEMU is disable LSX/LASX for kvm. This patch adds
kvm_check_cpucfg2() to check CPUCFG2.
[1]: https://lore.kernel.org/all/CABgObfZHRf7E_7Jk4uPRmSyxTy3EiuuYwHC35jQncNL9s-zTDA@mail.gmail.com/
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Message-Id: <20240122090206.1083584-1-gaosong@loongson.cn>
---
linux-headers/asm-loongarch/kvm.h | 1 +
target/loongarch/kvm/kvm.c | 45 ++++++++++++++++++++++++++-----
2 files changed, 39 insertions(+), 7 deletions(-)
diff --git a/linux-headers/asm-loongarch/kvm.h b/linux-headers/asm-loongarch/kvm.h
index c6ad2ee610..923d0bd382 100644
--- a/linux-headers/asm-loongarch/kvm.h
+++ b/linux-headers/asm-loongarch/kvm.h
@@ -79,6 +79,7 @@ struct kvm_fpu {
#define LOONGARCH_REG_64(TYPE, REG) (TYPE | KVM_REG_SIZE_U64 | (REG << LOONGARCH_REG_SHIFT))
#define KVM_IOC_CSRID(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CSR, REG)
#define KVM_IOC_CPUCFG(REG) LOONGARCH_REG_64(KVM_REG_LOONGARCH_CPUCFG, REG)
+#define KVM_LOONGARCH_VCPU_CPUCFG 0
struct kvm_debug_exit_arch {
};
diff --git a/target/loongarch/kvm/kvm.c b/target/loongarch/kvm/kvm.c
index 2230f029d0..c19978a970 100644
--- a/target/loongarch/kvm/kvm.c
+++ b/target/loongarch/kvm/kvm.c
@@ -540,6 +540,38 @@ static int kvm_loongarch_get_cpucfg(CPUState *cs)
return ret;
}
+static int kvm_check_cpucfg2(CPUState *cs)
+{
+ int ret;
+ uint64_t val;
+ struct kvm_device_attr attr = {
+ .group = KVM_LOONGARCH_VCPU_CPUCFG,
+ .attr = 2,
+ .addr = (uint64_t)&val,
+ };
+ LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+ CPULoongArchState *env = &cpu->env;
+
+ ret = kvm_vcpu_ioctl(cs, KVM_HAS_DEVICE_ATTR, &attr);
+
+ if (!ret) {
+ kvm_vcpu_ioctl(cs, KVM_GET_DEVICE_ATTR, &attr);
+ env->cpucfg[2] &= val;
+
+ if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) {
+ /* The FP minimal version is 1. */
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, FP_VER, 1);
+ }
+
+ if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LLFTP)) {
+ /* The LLFTP minimal version is 1. */
+ env->cpucfg[2] = FIELD_DP32(env->cpucfg[2], CPUCFG2, LLFTP_VER, 1);
+ }
+ }
+
+ return ret;
+}
+
static int kvm_loongarch_put_cpucfg(CPUState *cs)
{
int i, ret = 0;
@@ -548,14 +580,13 @@ static int kvm_loongarch_put_cpucfg(CPUState *cs)
uint64_t val;
for (i = 0; i < 21; i++) {
+ if (i == 2) {
+ ret = kvm_check_cpucfg2(cs);
+ if (ret) {
+ return ret;
+ }
+ }
val = env->cpucfg[i];
- /* LSX and LASX and LBT are not supported in kvm now */
- if (i == 2) {
- val &= ~(BIT(R_CPUCFG2_LSX_SHIFT) | BIT(R_CPUCFG2_LASX_SHIFT));
- val &= ~(BIT(R_CPUCFG2_LBT_X86_SHIFT) |
- BIT(R_CPUCFG2_LBT_ARM_SHIFT) |
- BIT(R_CPUCFG2_LBT_MIPS_SHIFT));
- }
ret = kvm_set_one_reg(cs, KVM_IOC_CPUCFG(i), &val);
if (ret < 0) {
trace_kvm_failed_put_cpucfg(strerror(errno));
--
2.27.0