32 lines
1.1 KiB
Diff
32 lines
1.1 KiB
Diff
From 1e483c1a6ed3f4a32f658031594c5a89ff955260 Mon Sep 17 00:00:00 2001
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From: mashoubing <mashoubing1@huawei.com>
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Date: Tue, 18 Aug 2020 19:17:27 +0800
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Subject: [PATCH 20/20] ZGC: in c1 load barrier d0 and d1 registers miss
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restoring
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DTS/AR: DTS2020072712733
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Summary: <gc>: <load barrier need to save and restore float registers correctly>
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LLT:
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Patch Type: huawei
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Bug url: https://gitlab.huawei.com/huaweijdk/jdk11u-dev/issues/857
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---
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src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
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index 4ce56895a..92b4d4335 100644
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--- a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
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+++ b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
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@@ -309,7 +309,7 @@ void ZBarrierSetAssembler::generate_c1_load_barrier_runtime_stub(StubAssembler*
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__ pop(save_regs, sp);
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- for (int i = 30; i >0; i -= 2) {
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+ for (int i = 30; i >= 0; i -= 2) {
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__ ldpd(as_FloatRegister(i), as_FloatRegister(i + 1), Address(__ post(sp, 16)));
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}
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--
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2.19.0
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