From 1e483c1a6ed3f4a32f658031594c5a89ff955260 Mon Sep 17 00:00:00 2001
Date: Tue, 18 Aug 2020 19:17:27 +0800
Subject: [PATCH 20/20] ZGC: in c1 load barrier d0 and d1 registers miss
 restoring

Summary: <gc>: <load barrier need to save and restore float registers correctly>
LLT:
---
 src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
index 4ce56895a..92b4d4335 100644
--- a/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
+++ b/src/hotspot/cpu/aarch64/gc/z/zBarrierSetAssembler_aarch64.cpp
@@ -309,7 +309,7 @@ void ZBarrierSetAssembler::generate_c1_load_barrier_runtime_stub(StubAssembler*
 
   __ pop(save_regs, sp);
 
-  for (int i = 30; i >0; i -= 2) {
+  for (int i = 30; i >= 0; i -= 2) {
       __ ldpd(as_FloatRegister(i), as_FloatRegister(i + 1), Address(__ post(sp, 16)));
     }
 
-- 
2.19.0