Add sw64 architecture
Signed-off-by: wzx <wuzx1226@qq.com> (cherry picked from commit 42cdbc4c23f4e31696cad3b1fd961c86ea3e84ba) (cherry picked from commit ea053b9b4827da745fdc9bb81186bbfc31001f55)
This commit is contained in:
wzx
openeuler-sync-bot
parent
1f4092f833
commit
20f4911a7e
135
lshw-B.02.19.2-sw.patch
Executable file
135
lshw-B.02.19.2-sw.patch
Executable file
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diff -Naur lshw-B.02.19.2.org/README.md lshw-B.02.19.2.sw/README.md
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--- lshw-B.02.19.2.org/README.md 2022-03-02 05:57:54.280000000 +0000
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+++ lshw-B.02.19.2.sw/README.md 2022-03-02 06:01:57.610000000 +0000
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@@ -14,7 +14,7 @@
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1. Requirements
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- Linux 2.4.x, 2.6.x, 3.x or 4.x (2.2.x might work, though)
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- - a PA-RISC-, Alpha-, IA-64- (Itanium-), PowerPC-, ARM- or x86- based machine
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+ - a PA-RISC-, Alpha-, Sw_64-, IA-64- (Itanium-), PowerPC-, ARM- or x86- based machine
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- cmake, GNU make or Ninja
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- an ANSI (or close enough to ANSI compliance) C++ compiler (tested with g++ 2.95.4 and 3.x)
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- for the (optional) GTK+ graphical user interface, you will need a
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diff -Naur lshw-B.02.19.2.org/src/core/cpuid.cc lshw-B.02.19.2.sw/src/core/cpuid.cc
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--- lshw-B.02.19.2.org/src/core/cpuid.cc 2022-03-02 05:57:54.280000000 +0000
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+++ lshw-B.02.19.2.sw/src/core/cpuid.cc 2022-03-02 06:17:08.250000000 +0000
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@@ -10,7 +10,7 @@
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__ID("@(#) $Id$");
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-#if defined(__i386__) || defined(__alpha__)
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+#if defined(__i386__) || defined(__alpha__) || deined(__sw_64__)
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static hwNode *getcache(hwNode & node,
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int n = 0)
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@@ -70,7 +70,7 @@
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else
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return NULL;
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}
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-#endif // __i386__ || __alpha__
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+#endif // __i386__ || __alpha__ || __sw_64__
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#ifdef __i386__
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diff -Naur lshw-B.02.19.2.org/src/core/cpuinfo.cc lshw-B.02.19.2.sw/src/core/cpuinfo.cc
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--- lshw-B.02.19.2.org/src/core/cpuinfo.cc 2022-03-02 05:57:54.280000000 +0000
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+++ lshw-B.02.19.2.sw/src/core/cpuinfo.cc 2022-03-02 06:09:36.460000000 +0000
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@@ -360,6 +360,63 @@
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}
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}
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+static void cpuinfo_sw_64(hwNode & node,
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+string id,
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+string value)
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+{
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+ static int cpusdetected = 0;
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+ static int cpusactive = 0;
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+ unsigned long long frequency = 0;
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+ int i;
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+
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+ hwNode *cpu = getcpu(node, 0);
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+
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+ if (id == "platform string" && node.getProduct() == "")
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+ node.setProduct(value);
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+ if (id == "system serial number" && node.getSerial() == "")
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+ node.setSerial(value);
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+ if (id == "system type")
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+ node.setVersion(node.getVersion() + " " + value);
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+ if (id == "system variation")
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+ node.setVersion(node.getVersion() + " " + value);
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+ if (id == "system revision")
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+ node.setVersion(node.getVersion() + " " + value);
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+
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+ if (id == "cpus detected")
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+ cpusdetected = atoi(value.c_str());
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+ if (id == "cpus active")
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+ cpusactive = atoi(value.c_str());
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+ if (id == "cycle frequency [Hz]")
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+ frequency = atoll(value.c_str());
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+
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+ if (cpu)
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+ {
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+ cpu->claim(true);
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+
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+ if (frequency)
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+ cpu->setSize(frequency);
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+ }
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+
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+ for (i = 1; i < cpusdetected; i++)
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+ {
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+ hwNode *mycpu = getcpu(node, i);
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+
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+ if (mycpu)
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+ {
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+ mycpu->disable();
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+
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+ if (cpu)
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+ mycpu->setSize(cpu->getSize());
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+ }
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+ }
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+ for (i = 1; i < cpusactive; i++)
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+ {
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+ hwNode *mycpu = getcpu(node, i);
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+
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+ if (mycpu)
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+ mycpu->enable();
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+ }
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+}
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static void cpuinfo_alpha(hwNode & node,
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string id,
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string value)
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@@ -637,6 +694,10 @@
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{
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cpuinfo_alpha(n, id, value);
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}
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+ else if (plat == "sw_64")
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+ {
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+ cpuinfo_sw_64(n, id, value);
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+ }
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else if (plat == "ia64")
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{
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cpuinfo_ia64(n, id, value);
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diff -Naur lshw-B.02.19.2.org/src/core/dmi.cc lshw-B.02.19.2.sw/src/core/dmi.cc
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--- lshw-B.02.19.2.org/src/core/dmi.cc 2022-03-02 05:57:54.280000000 +0000
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+++ lshw-B.02.19.2.sw/src/core/dmi.cc 2022-03-02 06:11:38.140000000 +0000
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@@ -734,7 +734,8 @@
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"Core M3",
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"Core M5",
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"Core M7",
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- "Alpha", /* 0x30 */
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+ "Sw_64", /* 0x9916 */
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+ "Alpha", /* 0x30 */
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"Alpha 21064",
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"Alpha 21066",
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"Alpha 21164",
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diff -Naur lshw-B.02.19.2.org/src/core/pci.cc lshw-B.02.19.2.sw/src/core/pci.cc
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--- lshw-B.02.19.2.org/src/core/pci.cc 2022-03-02 05:57:54.290000000 +0000
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+++ lshw-B.02.19.2.sw/src/core/pci.cc 2022-03-02 06:13:58.590000000 +0000
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@@ -169,6 +169,7 @@
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#define PCI_CLASS_PROCESSOR_486 0x0b01
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#define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
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#define PCI_CLASS_PROCESSOR_ALPHA 0x0b10
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+#define PCI_CLASS_PROCESSOR_SW_64 0x9916
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#define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
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#define PCI_CLASS_PROCESSOR_CO 0x0b40
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@ -1,6 +1,6 @@
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Name: lshw
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Name: lshw
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Version: B.02.19.2
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Version: B.02.19.2
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Release: 1
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Release: 2
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Summary: Hardware lister
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Summary: Hardware lister
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License: GPLv2
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License: GPLv2
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URL: http://ezix.org/project/wiki/HardwareLiSter
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URL: http://ezix.org/project/wiki/HardwareLiSter
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@ -9,6 +9,7 @@ Patch0: lshw-B.02.18-scandir.patch
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Patch2: lshw-B.02.18-revert-json.patch
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Patch2: lshw-B.02.18-revert-json.patch
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Patch3: lshw-B.02.19.2-cmake.patch
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Patch3: lshw-B.02.19.2-cmake.patch
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Patch4: lshw-B.02.19.2-sw.patch
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BuildRequires: gcc gcc-c++ cmake gettext
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BuildRequires: gcc gcc-c++ cmake gettext
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BuildRequires: desktop-file-utils libappstream-glib ninja-build
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BuildRequires: desktop-file-utils libappstream-glib ninja-build
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@ -38,6 +39,9 @@ The %{name}-help package contains doc files for %{name}.
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%patch02 -R -p1
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%patch02 -R -p1
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%patch03 -p1
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%patch03 -p1
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%ifarch sw_64
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%patch04 -p1
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%endif
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%build
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%build
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mkdir -p build && cd build
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mkdir -p build && cd build
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@ -74,6 +78,9 @@ src/lshw -json -disable usb -disable pcmcia -disable isapnp \
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%{_mandir}/man1/lshw.1.gz
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%{_mandir}/man1/lshw.1.gz
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%changelog
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%changelog
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* Mon Oct 24 2022 wuzx<wuzx1226@qq.com> - B.02.19.2-2
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- add sw64 patch
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* Wed Jan 27 2021 yuanxin <yuanxin24@huawei.com> - B.02.19.2-1
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* Wed Jan 27 2021 yuanxin <yuanxin24@huawei.com> - B.02.19.2-1
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- upgrade version to B.02.19.2
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- upgrade version to B.02.19.2
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