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!91 [sync] PR-90: libwd: update the source code

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From: @openeuler-sync-bot 
Reviewed-by: @hao-fang 
Signed-off-by: @hao-fang
This commit is contained in:
openeuler-ci-bot 2024-04-09 13:02:48 +00:00 committed by Gitee
commit 23c0440073
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GPG Key ID: 173E9B9CA92EEF8F
45 changed files with 15648 additions and 10 deletions
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201
0009-uadk-sec-move-function-to-wd_digest_drv.h.patch Normal file
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@ -0,0 +1,201 @@
From b1eeb7ddb8305466cdfb4e49cc68b0b4264d4a43 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Mon, 5 Feb 2024 17:24:21 +0800
Subject: [PATCH 09/44] uadk/sec: move function to wd_digest_drv.h
Since function get_hash_bd_type() will be used in multiple files,
move it to wd_digest_drv.h. And rename get_hash_bd_type to
get_hash_msg_type to make the function generic.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
drv/hisi_sec.c | 52 ++++++++++---------------------------
include/drv/wd_digest_drv.h | 27 ++++++++++++++++++-
2 files changed, 39 insertions(+), 40 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 5b114f6..9da21a8 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -200,13 +200,6 @@ enum sec_c_width {
C_WIDTH_CS3 = 0x3,
};
-enum hash_bd_type {
- HASH_SINGLE_BD,
- HASH_FRIST_BD,
- HASH_MIDDLE_BD,
- HASH_END_BD,
-};
-
struct hisi_sec_ctx {
struct wd_ctx_config_internal config;
};
@@ -1549,29 +1542,10 @@ static int long_hash_param_check(handle_t h_qp, struct wd_digest_msg *msg)
return 0;
}
-static enum hash_bd_type get_hash_bd_type(struct wd_digest_msg *msg)
-{
- /*
- * [has_next , iv_bytes]
- * [ 1 , 0 ] = long hash(frist bd)
- * [ 1 , 1 ] = long hash(middle bd)
- * [ 0 , 1 ] = long hash(end bd)
- * [ 0 , 0 ] = block hash(single bd)
- */
- if (msg->has_next && !msg->iv_bytes)
- return HASH_FRIST_BD;
- else if (msg->has_next && msg->iv_bytes)
- return HASH_MIDDLE_BD;
- else if (!msg->has_next && msg->iv_bytes)
- return HASH_END_BD;
- else
- return HASH_SINGLE_BD;
-}
-
static int fill_digest_long_hash(handle_t h_qp, struct wd_digest_msg *msg,
struct hisi_sec_sqe *sqe)
{
- enum hash_bd_type bd_type = get_hash_bd_type(msg);
+ enum hash_block_type block_type = get_hash_block_type(msg);
__u64 total_bits;
int ret;
@@ -1579,20 +1553,20 @@ static int fill_digest_long_hash(handle_t h_qp, struct wd_digest_msg *msg,
if (ret)
return ret;
- if (bd_type == HASH_FRIST_BD) {
+ if (block_type == HASH_FRIST_BLOCK) {
/* Long hash first */
sqe->ai_apd_cs = AI_GEN_INNER;
sqe->ai_apd_cs |= AUTHPAD_NOPAD << AUTHPAD_OFFSET;
}
- if (bd_type == HASH_MIDDLE_BD) {
+ if (block_type == HASH_MIDDLE_BLOCK) {
/* Long hash middle */
sqe->ai_apd_cs = AI_GEN_IVIN_ADDR;
sqe->ai_apd_cs |= AUTHPAD_NOPAD << AUTHPAD_OFFSET;
sqe->type2.a_ivin_addr = sqe->type2.mac_addr;
}
- if (bd_type == HASH_END_BD) {
+ if (block_type == HASH_END_BLOCK) {
/* Long hash end */
sqe->ai_apd_cs = AI_GEN_IVIN_ADDR;
sqe->ai_apd_cs |= AUTHPAD_PAD << AUTHPAD_OFFSET;
@@ -1658,16 +1632,16 @@ static int digest_long_bd_align_check(struct wd_digest_msg *msg)
static int digest_bd2_type_check(struct wd_digest_msg *msg)
{
- enum hash_bd_type type = get_hash_bd_type(msg);
+ enum hash_block_type type = get_hash_block_type(msg);
/* Long hash first and middle bd */
- if (type == HASH_FRIST_BD || type == HASH_MIDDLE_BD) {
+ if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) {
WD_ERR("hardware v2 not supports 0 size in long hash!\n");
return -WD_EINVAL;
}
/* Block mode hash bd */
- if (type == HASH_SINGLE_BD) {
+ if (type == HASH_SINGLE_BLOCK) {
WD_ERR("hardware v2 not supports 0 size in block hash!\n");
return -WD_EINVAL;
}
@@ -1677,9 +1651,9 @@ static int digest_bd2_type_check(struct wd_digest_msg *msg)
static int digest_bd3_type_check(struct wd_digest_msg *msg)
{
- enum hash_bd_type type = get_hash_bd_type(msg);
+ enum hash_block_type type = get_hash_block_type(msg);
/* Long hash first and middle bd */
- if (type == HASH_FRIST_BD || type == HASH_MIDDLE_BD) {
+ if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) {
WD_ERR("invalid: hardware v3 not supports 0 size in long hash!\n");
return -WD_EINVAL;
}
@@ -1920,7 +1894,7 @@ static int aes_auth_long_hash_check(struct wd_digest_msg *msg)
static int fill_digest_long_hash3(handle_t h_qp, struct wd_digest_msg *msg,
struct hisi_sec_sqe3 *sqe)
{
- enum hash_bd_type bd_type = get_hash_bd_type(msg);
+ enum hash_block_type block_type = get_hash_block_type(msg);
__u64 total_bits;
int ret;
@@ -1932,20 +1906,20 @@ static int fill_digest_long_hash3(handle_t h_qp, struct wd_digest_msg *msg,
if (ret)
return ret;
- if (bd_type == HASH_FRIST_BD) {
+ if (block_type == HASH_FRIST_BLOCK) {
/* Long hash first */
sqe->auth_mac_key |= AI_GEN_INNER << SEC_AI_GEN_OFFSET_V3;
sqe->stream_scene.stream_auth_pad = AUTHPAD_NOPAD;
}
- if (bd_type == HASH_MIDDLE_BD) {
+ if (block_type == HASH_MIDDLE_BLOCK) {
/* Long hash middle */
sqe->auth_mac_key |= AI_GEN_IVIN_ADDR << SEC_AI_GEN_OFFSET_V3;
sqe->stream_scene.stream_auth_pad = AUTHPAD_NOPAD;
sqe->auth_ivin.a_ivin_addr = sqe->mac_addr;
}
- if (bd_type == HASH_END_BD) {
+ if (block_type == HASH_END_BLOCK) {
/* Long hash end */
sqe->auth_mac_key |= AI_GEN_IVIN_ADDR << SEC_AI_GEN_OFFSET_V3;
sqe->stream_scene.stream_auth_pad = AUTHPAD_PAD;
diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h
index 3c4477d..304b506 100644
--- a/include/drv/wd_digest_drv.h
+++ b/include/drv/wd_digest_drv.h
@@ -10,7 +10,13 @@
extern "C" {
#endif
-/* fixme wd_digest_msg */
+enum hash_block_type {
+ HASH_FRIST_BLOCK,
+ HASH_MIDDLE_BLOCK,
+ HASH_END_BLOCK,
+ HASH_SINGLE_BLOCK,
+};
+
struct wd_digest_msg {
struct wd_digest_req req;
/* request identifier */
@@ -51,6 +57,25 @@ struct wd_digest_msg {
__u64 long_data_len;
};
+static inline enum hash_block_type get_hash_block_type(struct wd_digest_msg *msg)
+{
+ /*
+ * [has_next , iv_bytes]
+ * [ 1 , 0 ] = long hash(frist bd)
+ * [ 1 , 1 ] = long hash(middle bd)
+ * [ 0 , 1 ] = long hash(end bd)
+ * [ 0 , 0 ] = block hash(single bd)
+ */
+ if (msg->has_next && !msg->iv_bytes)
+ return HASH_FRIST_BLOCK;
+ else if (msg->has_next && msg->iv_bytes)
+ return HASH_MIDDLE_BLOCK;
+ else if (!msg->has_next && msg->iv_bytes)
+ return HASH_END_BLOCK;
+ else
+ return HASH_SINGLE_BLOCK;
+}
+
struct wd_digest_msg *wd_digest_get_msg(__u32 idx, __u32 tag);
#ifdef __cplusplus
--
2.25.1

149
0010-uadk-digest-add-partial_block-to-store-partial-data.patch Normal file
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@ -0,0 +1,149 @@
From 6ad149cab59176faf05e65233b4986916a1f7c8d Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Mon, 5 Feb 2024 17:27:07 +0800
Subject: [PATCH 10/44] uadk/digest: add partial_block to store partial data
For the long hash first blcok and middle block, if the size of
the data is not aligned with the block size, the partial data is
stored in partial_block and combined with the next block to form
an aligned length for calculation. Currently, partial_block is
added to struct wd_digest_sess to store partial data.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
include/drv/wd_digest_drv.h | 4 +++
wd_digest.c | 50 ++++++++++++++++++++++++-------------
2 files changed, 36 insertions(+), 18 deletions(-)
diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h
index 304b506..8a4aa0b 100644
--- a/include/drv/wd_digest_drv.h
+++ b/include/drv/wd_digest_drv.h
@@ -44,6 +44,8 @@ struct wd_digest_msg {
__u32 in_bytes;
/* out_bytes */
__u32 out_bytes;
+ /* partial bytes for stream mode */
+ __u32 partial_bytes;
/* input key pointer */
__u8 *key;
@@ -53,6 +55,8 @@ struct wd_digest_msg {
__u8 *in;
/* output data pointer */
__u8 *out;
+ /* partial pointer for stream mode */
+ __u8 *partial_block;
/* total of data for stream mode */
__u64 long_data_len;
};
diff --git a/wd_digest.c b/wd_digest.c
index acf341a..dba2f95 100644
--- a/wd_digest.c
+++ b/wd_digest.c
@@ -11,6 +11,7 @@
#include "wd_digest.h"
#define GMAC_IV_LEN 16
+#define MAX_BLOCK_SIZE 128
static __u32 g_digest_mac_len[WD_DIGEST_TYPE_MAX] = {
WD_DIGEST_SM3_LEN, WD_DIGEST_MD5_LEN, WD_DIGEST_SHA1_LEN,
@@ -45,6 +46,19 @@ struct wd_digest_setting {
void *dlh_list;
} wd_digest_setting;
+struct wd_digest_stream_data {
+ /* Long hash mode, first and middle block misaligned data */
+ unsigned char partial_block[MAX_BLOCK_SIZE];
+ __u32 partial_bytes;
+ /* Total data length for stream mode */
+ __u64 long_data_len;
+ /*
+ * Notify the stream message state, zero is frist message,
+ * non-zero is middle or final message.
+ */
+ int msg_state;
+};
+
struct wd_digest_sess {
char *alg_name;
enum wd_digest_type alg;
@@ -53,14 +67,7 @@ struct wd_digest_sess {
unsigned char key[MAX_HMAC_KEY_SIZE];
__u32 key_bytes;
void *sched_key;
- /*
- * Notify the stream message state, zero is frist message,
- * non-zero is middle or final message.
- */
- int msg_state;
-
- /* Total data length for stream mode */
- __u64 long_data_len;
+ struct wd_digest_stream_data stream_data;
};
struct wd_env_config wd_digest_env_config;
@@ -536,12 +543,12 @@ static void fill_request_msg(struct wd_digest_msg *msg,
memcpy(&msg->req, req, sizeof(struct wd_digest_req));
if (unlikely(req->has_next == WD_DIGEST_STREAM_END)) {
- sess->long_data_len = req->long_data_len;
- sess->msg_state = WD_DIGEST_DOING;
+ sess->stream_data.long_data_len = req->long_data_len;
+ sess->stream_data.msg_state = WD_DIGEST_DOING;
req->has_next = WD_DIGEST_END;
} else if (unlikely(req->has_next == WD_DIGEST_STREAM_DOING)) {
- sess->long_data_len = req->long_data_len;
- sess->msg_state = WD_DIGEST_DOING;
+ sess->stream_data.long_data_len = req->long_data_len;
+ sess->stream_data.msg_state = WD_DIGEST_DOING;
req->has_next = WD_DIGEST_DOING;
}
@@ -557,10 +564,12 @@ static void fill_request_msg(struct wd_digest_msg *msg,
msg->out_bytes = req->out_bytes;
msg->data_fmt = req->data_fmt;
msg->has_next = req->has_next;
- msg->long_data_len = sess->long_data_len + req->in_bytes;
+ msg->long_data_len = sess->stream_data.long_data_len + req->in_bytes;
+ msg->partial_block = sess->stream_data.partial_block;
+ msg->partial_bytes = sess->stream_data.partial_bytes;
/* Use iv_bytes to store the stream message state */
- msg->iv_bytes = sess->msg_state;
+ msg->iv_bytes = sess->stream_data.msg_state;
}
static int send_recv_sync(struct wd_ctx_internal *ctx, struct wd_digest_sess *dsess,
@@ -579,17 +588,22 @@ static int send_recv_sync(struct wd_ctx_internal *ctx, struct wd_digest_sess *ds
if (unlikely(ret))
return ret;
- /* After a stream mode job was done, update session long_data_len */
+ /*
+ * After a stream mode job was done, update session
+ * long_data_len and partial_bytes.
+ */
if (msg->has_next) {
/* Long hash(first and middle message) */
- dsess->long_data_len += msg->in_bytes;
+ dsess->stream_data.long_data_len += msg->in_bytes;
+ dsess->stream_data.partial_bytes = msg->partial_bytes;
} else if (msg->iv_bytes) {
/* Long hash(final message) */
- dsess->long_data_len = 0;
+ dsess->stream_data.long_data_len = 0;
+ dsess->stream_data.partial_bytes = 0;
}
/* Update session message state */
- dsess->msg_state = msg->has_next;
+ dsess->stream_data.msg_state = msg->has_next;
return 0;
}
--
2.25.1

77
0011-uadk-digest-add-wd_ctx_spin_lock-function.patch Normal file
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@ -0,0 +1,77 @@
From b06161de909136e59ecd7f148ef7e8ba72652e34 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Mon, 5 Feb 2024 17:27:17 +0800
Subject: [PATCH 11/44] uadk/digest: add wd_ctx_spin_lock function
In synchronous mode, to protect hardware queue resources and
prevent multiple threads from sending packets to the same queue
at the same time, lock is added before packets are sent in function
send_recv_sync().
In non-hard computing scenarios, the resources are independent,
and multiple synchronization threads can process at the same time.
If lock is added before packets are sent, the multi-thread performance
deteriorates. Therefore, the wd_ctx_spin_lock and wd_ctx_spin_unlock
interfaces are added. In non-hard computing scenarios, the lock
is not added.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
include/wd_util.h | 23 +++++++++++++++++++++++
wd_digest.c | 4 ++--
2 files changed, 25 insertions(+), 2 deletions(-)
diff --git a/include/wd_util.h b/include/wd_util.h
index 3059ac1..f217f0f 100644
--- a/include/wd_util.h
+++ b/include/wd_util.h
@@ -527,6 +527,29 @@ static inline void wd_dfx_msg_cnt(struct wd_ctx_config_internal *config,
config->msg_cnt[sqn]++;
}
+/**
+ * wd_ctx_spin_lock() - Lock interface, which is used in the synchronization process.
+ * @ctx: queue context.
+ * @type: the type of the driver.
+ *
+ * If the drvier type is not UADK_ALG_HW, the lock is not required.
+ */
+static inline void wd_ctx_spin_lock(struct wd_ctx_internal *ctx, int type)
+{
+ if (type != UADK_ALG_HW)
+ return;
+
+ pthread_spin_lock(&ctx->lock);
+}
+
+static inline void wd_ctx_spin_unlock(struct wd_ctx_internal *ctx, int type)
+{
+ if (type != UADK_ALG_HW)
+ return;
+
+ pthread_spin_unlock(&ctx->lock);
+}
+
#ifdef __cplusplus
}
#endif
diff --git a/wd_digest.c b/wd_digest.c
index dba2f95..c59184d 100644
--- a/wd_digest.c
+++ b/wd_digest.c
@@ -581,10 +581,10 @@ static int send_recv_sync(struct wd_ctx_internal *ctx, struct wd_digest_sess *ds
msg_handle.send = wd_digest_setting.driver->send;
msg_handle.recv = wd_digest_setting.driver->recv;
- pthread_spin_lock(&ctx->lock);
+ wd_ctx_spin_lock(ctx, wd_digest_setting.driver->calc_type);
ret = wd_handle_msg_sync(wd_digest_setting.driver, &msg_handle, ctx->ctx,
msg, NULL, wd_digest_setting.config.epoll_en);
- pthread_spin_unlock(&ctx->lock);
+ wd_ctx_spin_unlock(ctx, wd_digest_setting.driver->calc_type);
if (unlikely(ret))
return ret;
--
2.25.1

28
0012-uadk-remove-redundant-header-file-in-makefile.patch Normal file
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@ -0,0 +1,28 @@
From 415b2d379fd74e1e115c9f15b86e976f5c5addb7 Mon Sep 17 00:00:00 2001
From: Zhiqi Song <songzhiqi1@huawei.com>
Date: Tue, 12 Mar 2024 11:38:46 +0800
Subject: [PATCH 12/44] uadk: remove redundant header file in makefile
Remove wrong 'wd_hpre_udrv.h' of hpre.
Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com>
---
Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile.am b/Makefile.am
index 64cfa44..25853eb 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -86,7 +86,7 @@ libhisi_sec_la_SOURCES=drv/hisi_sec.c drv/hisi_qm_udrv.c \
hisi_qm_udrv.h wd_cipher_drv.h wd_aead_drv.h aes.h galois.h
libhisi_hpre_la_SOURCES=drv/hisi_hpre.c drv/hisi_qm_udrv.c \
- hisi_qm_udrv.h wd_hpre_drv.h
+ hisi_qm_udrv.h
if WD_STATIC_DRV
AM_CFLAGS += -DWD_STATIC_DRV -fPIC
AM_CFLAGS += -DWD_NO_LOG
--
2.25.1

1888
0013-uadk-isa-ce-support-sm3-ce-instruction.patch Normal file
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File diff suppressed because it is too large Load Diff

33
0014-uadk-fix-control-range-of-environmemt-variable.patch Normal file
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@ -0,0 +1,33 @@
From 7869d42227f03754e4117a17751e6959b3f93bca Mon Sep 17 00:00:00 2001
From: Zhiqi Song <songzhiqi1@huawei.com>
Date: Mon, 11 Mar 2024 18:07:23 +0800
Subject: [PATCH 14/44] uadk: fix control range of environmemt variable
Environment variable will not be used in non-hardware
situation to config the ctx num. So add an interception
condition to avoid the impact of environment variables
on the initialization of non-hardware situations.
Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com>
---
wd_util.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/wd_util.c b/wd_util.c
index 39909ca..b8e755c 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -2111,8 +2111,9 @@ int wd_ctx_param_init(struct wd_ctx_params *ctx_params,
return -WD_ENOMEM;
}
+ /* Only hw driver support environment variable */
var_s = secure_getenv(env_name);
- if (var_s && strlen(var_s)) {
+ if (var_s && strlen(var_s) && driver->calc_type == UADK_ALG_HW) {
/* environment variable has the highest priority */
ret = wd_env_set_ctx_nums(driver->alg_name, env_name, var_s,
ctx_params, max_op_type);
--
2.25.1

72
0015-uadk-util-use-default-sched_type-for-instruction-tas.patch Normal file
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@ -0,0 +1,72 @@
From 1839b896bbb7cfaddbd8b19d322465c7ef7e185c Mon Sep 17 00:00:00 2001
From: Zhiqi Song <songzhiqi1@huawei.com>
Date: Mon, 11 Mar 2024 18:07:24 +0800
Subject: [PATCH 15/44] uadk/util: use default sched_type for instruction task
To prevent users from perceiving the difference in instruction
acceleration task, no longer check the specific sched_type, just
accept sched_type within the valid range from user, and use
default sched_type inside.
As sched_type is checked before init2 calls wd_alg_attrs_init().
Redundancy check is not needed.
Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com>
---
include/wd_sched.h | 2 +-
wd_util.c | 12 ++----------
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/include/wd_sched.h b/include/wd_sched.h
index b145172..be541c6 100644
--- a/include/wd_sched.h
+++ b/include/wd_sched.h
@@ -21,7 +21,7 @@ enum sched_policy_type {
SCHED_POLICY_RR = 0,
/* requests will no need ctxs */
SCHED_POLICY_NONE,
- /* requests will need a fixed ctx */
+ /* requests will need a fixed ctx */
SCHED_POLICY_SINGLE,
SCHED_POLICY_BUTT,
};
diff --git a/wd_util.c b/wd_util.c
index b8e755c..fb58167 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -2681,12 +2681,6 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs)
switch (driver_type) {
case UADK_ALG_SOFT:
case UADK_ALG_CE_INSTR:
- /* No need to alloc resource */
- if (sched_type != SCHED_POLICY_NONE) {
- WD_ERR("invalid sched_type\n");
- return -WD_EINVAL;
- }
-
ctx_config = calloc(1, sizeof(*ctx_config));
if (!ctx_config) {
WD_ERR("fail to alloc ctx config\n");
@@ -2694,6 +2688,7 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs)
}
attrs->ctx_config = ctx_config;
+ /* Use default sched_type to alloc scheduler */
alg_sched = wd_sched_rr_alloc(SCHED_POLICY_NONE, 1, 1, alg_poll_func);
if (!alg_sched) {
WD_ERR("fail to alloc scheduler\n");
@@ -2714,10 +2709,7 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs)
break;
case UADK_ALG_SVE_INSTR:
- /* Todo lock cpu core */
- if (sched_type != SCHED_POLICY_SINGLE)
- return -WD_EINVAL;
-
+ /* Use default sched_type to alloc scheduler */
alg_sched = wd_sched_rr_alloc(SCHED_POLICY_SINGLE, 1, 1, alg_poll_func);
if (!alg_sched) {
WD_ERR("fail to alloc scheduler\n");
--
2.25.1

184
0016-uadk-digest-modify-spelling-errors.patch Normal file
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@ -0,0 +1,184 @@
From f7d1cbe8850ceae6de4aed1fd5fa81f029da753f Mon Sep 17 00:00:00 2001
From: Zhiqi Song <songzhiqi1@huawei.com>
Date: Fri, 15 Mar 2024 15:22:06 +0800
Subject: [PATCH 16/44] uadk/digest: modify spelling errors
Modify spelling errors related to digest stream mode.
Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com>
---
drv/hisi_sec.c | 8 ++++----
drv/isa_ce_sm3.c | 4 ++--
include/drv/wd_digest_drv.h | 6 +++---
v1/test/hisi_sec_test/test_hisi_sec.c | 5 ++---
v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c | 5 ++---
wd_digest.c | 2 +-
6 files changed, 14 insertions(+), 16 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 9da21a8..ac62109 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -1553,7 +1553,7 @@ static int fill_digest_long_hash(handle_t h_qp, struct wd_digest_msg *msg,
if (ret)
return ret;
- if (block_type == HASH_FRIST_BLOCK) {
+ if (block_type == HASH_FIRST_BLOCK) {
/* Long hash first */
sqe->ai_apd_cs = AI_GEN_INNER;
sqe->ai_apd_cs |= AUTHPAD_NOPAD << AUTHPAD_OFFSET;
@@ -1635,7 +1635,7 @@ static int digest_bd2_type_check(struct wd_digest_msg *msg)
enum hash_block_type type = get_hash_block_type(msg);
/* Long hash first and middle bd */
- if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) {
+ if (type == HASH_FIRST_BLOCK || type == HASH_MIDDLE_BLOCK) {
WD_ERR("hardware v2 not supports 0 size in long hash!\n");
return -WD_EINVAL;
}
@@ -1653,7 +1653,7 @@ static int digest_bd3_type_check(struct wd_digest_msg *msg)
{
enum hash_block_type type = get_hash_block_type(msg);
/* Long hash first and middle bd */
- if (type == HASH_FRIST_BLOCK || type == HASH_MIDDLE_BLOCK) {
+ if (type == HASH_FIRST_BLOCK || type == HASH_MIDDLE_BLOCK) {
WD_ERR("invalid: hardware v3 not supports 0 size in long hash!\n");
return -WD_EINVAL;
}
@@ -1906,7 +1906,7 @@ static int fill_digest_long_hash3(handle_t h_qp, struct wd_digest_msg *msg,
if (ret)
return ret;
- if (block_type == HASH_FRIST_BLOCK) {
+ if (block_type == HASH_FIRST_BLOCK) {
/* Long hash first */
sqe->auth_mac_key |= AI_GEN_INNER << SEC_AI_GEN_OFFSET_V3;
sqe->stream_scene.stream_auth_pad = AUTHPAD_NOPAD;
diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c
index f16bdd3..0309861 100644
--- a/drv/isa_ce_sm3.c
+++ b/drv/isa_ce_sm3.c
@@ -187,7 +187,7 @@ static int do_sm3_ce(struct wd_digest_msg *msg, __u8 *out_digest)
sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress);
sm3_ce_final(&sctx, out_digest, sm3_ce_block_compress);
break;
- case HASH_FRIST_BLOCK:
+ case HASH_FIRST_BLOCK:
sm3_ce_init(&sctx);
sm3_ce_update(&sctx, data, data_len, sm3_ce_block_compress);
trans_output_result(out_digest, sctx.word_reg);
@@ -305,7 +305,7 @@ static int do_hmac_sm3_ce(struct wd_digest_msg *msg, __u8 *out_hmac)
sm3_ce_hmac_update(&hctx, data, data_len);
sm3_ce_hmac_final(&hctx, out_hmac);
break;
- case HASH_FRIST_BLOCK:
+ case HASH_FIRST_BLOCK:
sm3_ce_hmac_init(&hctx, key, key_len);
sm3_ce_hmac_update(&hctx, data, data_len);
trans_output_result(out_hmac, hctx.sctx.word_reg);
diff --git a/include/drv/wd_digest_drv.h b/include/drv/wd_digest_drv.h
index 8a4aa0b..a55ef5b 100644
--- a/include/drv/wd_digest_drv.h
+++ b/include/drv/wd_digest_drv.h
@@ -11,7 +11,7 @@ extern "C" {
#endif
enum hash_block_type {
- HASH_FRIST_BLOCK,
+ HASH_FIRST_BLOCK,
HASH_MIDDLE_BLOCK,
HASH_END_BLOCK,
HASH_SINGLE_BLOCK,
@@ -65,13 +65,13 @@ static inline enum hash_block_type get_hash_block_type(struct wd_digest_msg *msg
{
/*
* [has_next , iv_bytes]
- * [ 1 , 0 ] = long hash(frist bd)
+ * [ 1 , 0 ] = long hash(first bd)
* [ 1 , 1 ] = long hash(middle bd)
* [ 0 , 1 ] = long hash(end bd)
* [ 0 , 0 ] = block hash(single bd)
*/
if (msg->has_next && !msg->iv_bytes)
- return HASH_FRIST_BLOCK;
+ return HASH_FIRST_BLOCK;
else if (msg->has_next && msg->iv_bytes)
return HASH_MIDDLE_BLOCK;
else if (!msg->has_next && msg->iv_bytes)
diff --git a/v1/test/hisi_sec_test/test_hisi_sec.c b/v1/test/hisi_sec_test/test_hisi_sec.c
index 824fe9e..7d94332 100644
--- a/v1/test/hisi_sec_test/test_hisi_sec.c
+++ b/v1/test/hisi_sec_test/test_hisi_sec.c
@@ -1462,7 +1462,7 @@ static int sec_cipher_async_test(int thread_num, __u64 lcore_mask,
SEC_TST_PRT("%s(): create pool fail!\n", __func__);
return -ENOMEM;
}
- /* frist create the async poll thread! */
+ /* first create the async poll thread! */
test_thrds_data[0].pool = pool;
test_thrds_data[0].q = &q;
test_thrds_data[0].thread_num = 1;
@@ -2069,7 +2069,7 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask,
SEC_TST_PRT("%s(): create pool fail!\n", __func__);
return -ENOMEM;
}
- /* frist create the async poll thread! */
+ /* first create the async poll thread! */
test_thrds_data[0].pool = pool;
test_thrds_data[0].q = &q;
test_thrds_data[0].thread_num = 1;
@@ -2082,7 +2082,6 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask,
return ret;
}
- //Ïß³ÌÊý Óë°óºË
if (_get_one_bits(lcore_mask) == 0 &&
_get_one_bits(hcore_mask) == 0)
cnt = thd_num;
diff --git a/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c b/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c
index b7513d1..b13915f 100644
--- a/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c
+++ b/v1/test/hisi_sec_test_sgl/test_hisi_sec_sgl.c
@@ -1733,7 +1733,7 @@ static int sec_cipher_async_test(int thread_num, __u64 lcore_mask,
SEC_TST_PRT("%s(): create pool fail!\n", __func__);
return -ENOMEM;
}
- /* frist create the async poll thread! */
+ /* first create the async poll thread! */
test_thrds_data[0].pool = pool;
test_thrds_data[0].q = &q;
test_thrds_data[0].thread_num = 1;
@@ -2640,7 +2640,7 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask,
return -ENOMEM;
}
- /* frist create the async poll thread! */
+ /* first create the async poll thread! */
test_thrds_data[0].pool = pool;
test_thrds_data[0].q = &q;
test_thrds_data[0].thread_num = 1;
@@ -2654,7 +2654,6 @@ static int sec_aead_async_test(int thd_num, __u64 lcore_mask,
return ret;
}
- //Ïß³ÌÊý Óë°óºË
if (_get_one_bits(lcore_mask) == 0 &&
_get_one_bits(hcore_mask) == 0)
cnt = thd_num;
diff --git a/wd_digest.c b/wd_digest.c
index 491502a..10ac080 100644
--- a/wd_digest.c
+++ b/wd_digest.c
@@ -53,7 +53,7 @@ struct wd_digest_stream_data {
/* Total data length for stream mode */
__u64 long_data_len;
/*
- * Notify the stream message state, zero is frist message,
+ * Notify the stream message state, zero is first message,
* non-zero is middle or final message.
*/
int msg_state;
--
2.25.1

152
0017-uadk-drv-hisi-fix-failed-to-init-drv-after-fork.patch Normal file
View File

@ -0,0 +1,152 @@
From 6a6831101e99323fc5e9b63baa7e86ae8ac244ee Mon Sep 17 00:00:00 2001
From: Yang Shen <shenyang39@huawei.com>
Date: Thu, 22 Feb 2024 15:23:33 +0800
Subject: [PATCH 17/44] uadk: drv/hisi - fix failed to init drv after fork
The drivers initialization function use 'drv.priv' to forbid reinit.
But if the child process is forked after the parent process has
initialized, it can't work due to the drivers go to wrong branch on
initialization.
And the algorithms initialization function is already protected
against re-entry. So it is unnecessary to check 'drv.priv' in driver.
Signed-off-by: Yang Shen <shenyang39@huawei.com>
---
drv/hisi_comp.c | 7 +------
drv/hisi_hpre.c | 34 ++++++++++++++--------------------
drv/hisi_sec.c | 7 +------
3 files changed, 16 insertions(+), 32 deletions(-)
diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c
index 2cb9a6b..a1af567 100644
--- a/drv/hisi_comp.c
+++ b/drv/hisi_comp.c
@@ -787,18 +787,13 @@ static void hisi_zip_sqe_ops_adapt(handle_t h_qp)
static int hisi_zip_init(struct wd_alg_driver *drv, void *conf)
{
- struct hisi_zip_ctx *priv = (struct hisi_zip_ctx *)drv->priv;
struct wd_ctx_config_internal *config = conf;
struct hisi_qm_priv qm_priv;
+ struct hisi_zip_ctx *priv;
handle_t h_qp = 0;
handle_t h_ctx;
__u32 i, j;
- if (priv) {
- /* return if already inited */
- return 0;
- }
-
if (!config->ctx_num) {
WD_ERR("invalid: zip init config ctx num is 0!\n");
return -WD_EINVAL;
diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c
index 049e60e..babc795 100644
--- a/drv/hisi_hpre.c
+++ b/drv/hisi_hpre.c
@@ -527,62 +527,56 @@ out:
static int hpre_rsa_dh_init(struct wd_alg_driver *drv, void *conf)
{
struct wd_ctx_config_internal *config = (struct wd_ctx_config_internal *)conf;
- struct hisi_hpre_ctx *priv = (struct hisi_hpre_ctx *)drv->priv;
struct hisi_qm_priv qm_priv;
+ struct hisi_hpre_ctx *priv;
int ret;
- if (priv) {
- /* return if already inited */
- return WD_SUCCESS;
- }
-
if (!config->ctx_num) {
WD_ERR("invalid: hpre rsa/dh init config ctx num is 0!\n");
return -WD_EINVAL;
}
- drv->priv = malloc(sizeof(struct hisi_hpre_ctx));
- if (!drv->priv)
+ priv = malloc(sizeof(struct hisi_hpre_ctx));
+ if (!priv)
return -WD_EINVAL;
qm_priv.op_type = HPRE_HW_V2_ALG_TYPE;
- ret = hpre_init_qm_priv(config, drv->priv, &qm_priv);
+ ret = hpre_init_qm_priv(config, priv, &qm_priv);
if (ret) {
- free(drv->priv);
+ free(priv);
return ret;
}
+ drv->priv = priv;
+
return WD_SUCCESS;
}
static int hpre_ecc_init(struct wd_alg_driver *drv, void *conf)
{
struct wd_ctx_config_internal *config = (struct wd_ctx_config_internal *)conf;
- struct hisi_hpre_ctx *priv = (struct hisi_hpre_ctx *)drv->priv;
struct hisi_qm_priv qm_priv;
+ struct hisi_hpre_ctx *priv;
int ret;
- if (priv) {
- /* return if already inited */
- return WD_SUCCESS;
- }
-
if (!config->ctx_num) {
WD_ERR("invalid: hpre ecc init config ctx num is 0!\n");
return -WD_EINVAL;
}
- drv->priv = malloc(sizeof(struct hisi_hpre_ctx));
- if (!drv->priv)
+ priv = malloc(sizeof(struct hisi_hpre_ctx));
+ if (!priv)
return -WD_EINVAL;
qm_priv.op_type = HPRE_HW_V3_ECC_ALG_TYPE;
- ret = hpre_init_qm_priv(config, drv->priv, &qm_priv);
+ ret = hpre_init_qm_priv(config, priv, &qm_priv);
if (ret) {
- free(drv->priv);
+ free(priv);
return ret;
}
+ drv->priv = priv;
+
return WD_SUCCESS;
}
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index ac62109..852340d 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -3041,18 +3041,13 @@ static int hisi_sec_aead_recv_v3(struct wd_alg_driver *drv, handle_t ctx, void *
static int hisi_sec_init(struct wd_alg_driver *drv, void *conf)
{
- struct hisi_sec_ctx *priv = (struct hisi_sec_ctx *)drv->priv;
struct wd_ctx_config_internal *config = conf;
struct hisi_qm_priv qm_priv;
+ struct hisi_sec_ctx *priv;
handle_t h_qp = 0;
handle_t h_ctx;
__u32 i, j;
- if (priv) {
- /* return if already inited */
- return 0;
- }
-
if (!config->ctx_num) {
WD_ERR("invalid: sec init config ctx num is 0!\n");
return -WD_EINVAL;
--
2.25.1

33
0018-wd_rsa-fix-wd_rsa_common_uninit-re-entry.patch Normal file
View File

@ -0,0 +1,33 @@
From 2366ff7e765c5c451ab761cd0f9f9f6fbde4add3 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Thu, 1 Feb 2024 14:25:14 +0000
Subject: [PATCH 18/44] wd_rsa: fix wd_rsa_common_uninit re-entry
Fix wd_rsa_common_uninit re-entry
Fixs: 3fc344a drivers alloc and free resources by themself
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
wd_rsa.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/wd_rsa.c b/wd_rsa.c
index de0b796..8e51177 100644
--- a/wd_rsa.c
+++ b/wd_rsa.c
@@ -167,6 +167,12 @@ out_clear_ctx_config:
static int wd_rsa_common_uninit(void)
{
+ enum wd_status status;
+
+ wd_alg_get_init(&wd_rsa_setting.status, &status);
+ if (status == WD_UNINIT)
+ return -WD_EINVAL;
+
/* uninit async request pool */
wd_uninit_async_request_pool(&wd_rsa_setting.pool);
--
2.25.1

32
0019-wd_dh-Fix-wd_aead_uninit-re-entry.patch Normal file
View File

@ -0,0 +1,32 @@
From 72d2f8d98ee7322463f66be3aa8dea7a9e0b0811 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Tue, 19 Mar 2024 02:37:51 +0000
Subject: [PATCH 19/44] wd_dh: Fix wd_aead_uninit re-entry
Check status for the re-entry
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
wd_dh.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/wd_dh.c b/wd_dh.c
index d23bb61..4d08de6 100644
--- a/wd_dh.c
+++ b/wd_dh.c
@@ -127,6 +127,12 @@ out_clear_ctx_config:
static int wd_dh_common_uninit(void)
{
+ enum wd_status status;
+
+ wd_alg_get_init(&wd_dh_setting.status, &status);
+ if (status == WD_UNINIT)
+ return -WD_EINVAL;
+
/* uninit async request pool */
wd_uninit_async_request_pool(&wd_dh_setting.pool);
--
2.25.1

32
0020-wd_ecc-Fix-wd_ecc_uninit-re-entry.patch Normal file
View File

@ -0,0 +1,32 @@
From 105fec19d2f5008009504e9e051dc2aec42bd113 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Tue, 19 Mar 2024 02:40:09 +0000
Subject: [PATCH 20/44] wd_ecc: Fix wd_ecc_uninit re-entry
Check status for the re-entry
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
wd_ecc.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/wd_ecc.c b/wd_ecc.c
index 9aa1519..e75bca0 100644
--- a/wd_ecc.c
+++ b/wd_ecc.c
@@ -190,6 +190,12 @@ out_clear_ctx_config:
static int wd_ecc_common_uninit(void)
{
+ enum wd_status status;
+
+ wd_alg_get_init(&wd_ecc_setting.status, &status);
+ if (status == WD_UNINIT)
+ return -WD_EINVAL;
+
/* uninit async request pool */
wd_uninit_async_request_pool(&wd_ecc_setting.pool);
--
2.25.1

71
0021-wd_digest-uninit-check-status-in-one-func.patch Normal file
View File

@ -0,0 +1,71 @@
From f690d2e248be5270b9cdda6f2b8af18af580ab49 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Tue, 19 Mar 2024 02:42:39 +0000
Subject: [PATCH 21/44] wd_digest: uninit check status in one func
To simplify code, checking status in one func
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
wd_digest.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/wd_digest.c b/wd_digest.c
index 10ac080..0df7204 100644
--- a/wd_digest.c
+++ b/wd_digest.c
@@ -296,23 +296,29 @@ out_clear_init:
return ret;
}
-static void wd_digest_uninit_nolock(void)
+static int wd_digest_uninit_nolock(void)
{
+ enum wd_status status;
+
+ wd_alg_get_init(&wd_digest_setting.status, &status);
+ if (status == WD_UNINIT)
+ return -WD_EINVAL;
+
wd_uninit_async_request_pool(&wd_digest_setting.pool);
wd_clear_sched(&wd_digest_setting.sched);
wd_alg_uninit_driver(&wd_digest_setting.config,
wd_digest_setting.driver);
+ return 0;
}
void wd_digest_uninit(void)
{
- enum wd_status status;
+ int ret;
- wd_alg_get_init(&wd_digest_setting.status, &status);
- if (status == WD_UNINIT)
+ ret = wd_digest_uninit_nolock();
+ if (ret)
return;
- wd_digest_uninit_nolock();
wd_digest_close_driver();
wd_alg_clear_init(&wd_digest_setting.status);
}
@@ -419,13 +425,12 @@ out_uninit:
void wd_digest_uninit2(void)
{
- enum wd_status status;
+ int ret;
- wd_alg_get_init(&wd_digest_setting.status, &status);
- if (status == WD_UNINIT)
+ ret = wd_digest_uninit_nolock();
+ if (ret)
return;
- wd_digest_uninit_nolock();
wd_alg_attrs_uninit(&wd_digest_init_attrs);
wd_alg_drv_unbind(wd_digest_setting.driver);
wd_dlclose_drv(wd_digest_setting.dlh_list);
--
2.25.1

72
0022-wd_aead-uninit-check-status-in-one-func.patch Normal file
View File

@ -0,0 +1,72 @@
From e726680f9c8c9bfcf143d529be34d5b7ce2157be Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Tue, 19 Mar 2024 02:44:21 +0000
Subject: [PATCH 22/44] wd_aead: uninit check status in one func
To simplify code, checking status in one func
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
wd_aead.c | 24 +++++++++++++++---------
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/wd_aead.c b/wd_aead.c
index 34a3b86..57daa80 100644
--- a/wd_aead.c
+++ b/wd_aead.c
@@ -485,23 +485,30 @@ out_clear_init:
return ret;
}
-static void wd_aead_uninit_nolock(void)
+static int wd_aead_uninit_nolock(void)
{
+ enum wd_status status;
+
+ wd_alg_get_init(&wd_aead_setting.status, &status);
+ if (status == WD_UNINIT)
+ return -WD_EINVAL;
+
wd_uninit_async_request_pool(&wd_aead_setting.pool);
wd_clear_sched(&wd_aead_setting.sched);
wd_alg_uninit_driver(&wd_aead_setting.config,
wd_aead_setting.driver);
+
+ return 0;
}
void wd_aead_uninit(void)
{
- enum wd_status status;
+ int ret;
- wd_alg_get_init(&wd_aead_setting.status, &status);
- if (status == WD_UNINIT)
+ ret = wd_aead_uninit_nolock();
+ if (ret)
return;
- wd_aead_uninit_nolock();
wd_aead_close_driver();
wd_alg_clear_init(&wd_aead_setting.status);
}
@@ -614,13 +621,12 @@ out_uninit:
void wd_aead_uninit2(void)
{
- enum wd_status status;
+ int ret;
- wd_alg_get_init(&wd_aead_setting.status, &status);
- if (status == WD_UNINIT)
+ ret = wd_aead_uninit_nolock();
+ if (ret)
return;
- wd_aead_uninit_nolock();
wd_alg_attrs_uninit(&wd_aead_init_attrs);
wd_alg_drv_unbind(wd_aead_setting.driver);
wd_dlclose_drv(wd_aead_setting.dlh_list);
--
2.25.1

39
0023-makefile-install-wd_zlibwrapper.h-to-system.patch Normal file
View File

@ -0,0 +1,39 @@
From 9d4a68db517d42ac3cb9ae66aabfb2ea73303344 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Sun, 10 Mar 2024 13:57:53 +0000
Subject: [PATCH 23/44] makefile: install wd_zlibwrapper.h to system
wd_zlibwrapper.h is requird by other sub-system, so move
it to system header folder like /usr/local/include/uadk/
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
Makefile.am | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile.am b/Makefile.am
index 19eab30..cd3d7e5 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -35,7 +35,8 @@ AM_CFLAGS+= -DUADK_RELEASED_TIME="\"Released ${MONTH} ${DAY}, ${YEAR}\""
pkginclude_HEADERS = include/wd.h include/wd_cipher.h include/wd_aead.h \
include/wd_comp.h include/wd_dh.h include/wd_digest.h \
include/wd_rsa.h include/uacce.h include/wd_alg_common.h \
- include/wd_ecc.h include/wd_sched.h include/wd_alg.h
+ include/wd_ecc.h include/wd_sched.h include/wd_alg.h \
+ include/wd_zlibwrapper.h
nobase_pkginclude_HEADERS = v1/wd.h v1/wd_cipher.h v1/wd_aead.h v1/uacce.h v1/wd_dh.h \
v1/wd_digest.h v1/wd_rsa.h v1/wd_bmm.h
@@ -67,7 +68,7 @@ libwd_la_SOURCES=wd.c wd_mempool.c wd.h wd_alg.c wd_alg.h \
v1/drv/hisi_rng_udrv.c v1/drv/hisi_rng_udrv.h
libwd_comp_la_SOURCES=wd_comp.c wd_comp.h wd_comp_drv.h wd_util.c wd_util.h \
- wd_sched.c wd_sched.h wd.c wd.h wd_zlibwrapper.c wd_zlibwrapper.h
+ wd_sched.c wd_sched.h wd.c wd.h wd_zlibwrapper.c
libhisi_zip_la_SOURCES=drv/hisi_comp.c hisi_comp.h drv/hisi_qm_udrv.c \
hisi_qm_udrv.h wd_comp_drv.h
--
2.25.1

33
0024-conf-fix-includedir.patch Normal file
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@ -0,0 +1,33 @@
From 9590cd2df74a0bf82fa4d3420e851792195f782a Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Sun, 10 Mar 2024 14:02:03 +0000
Subject: [PATCH 24/44] conf: fix includedir
pkgincludedir already appended $(PACKAGE) [1], so no need
adding "uadk". Otherwise, header files will be installed to
"/usr/local/include/uadk/uadk/"
[1] https://www.sourceware.org/autobook/autobook/autobook_76.html
pkgincludedir
This is a convenience variable whose value is
"$(includedir)/$(PACKAGE)".
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
conf.sh | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/conf.sh b/conf.sh
index 59af821..c361fbc 100755
--- a/conf.sh
+++ b/conf.sh
@@ -16,5 +16,5 @@ ac_cv_func_malloc_0_nonnull=yes ac_cv_func_realloc_0_nonnull=yes ./configure \
--enable-perf=yes \
--host aarch64-linux-gnu \
--target aarch64-linux-gnu \
- --includedir=/usr/local/include/uadk \
+ --includedir=/usr/local/include/ \
$COMPILE_TYPE
--
2.25.1

1170
0025-cipher-add-support-for-SM4-CBC-and-CTR-modes-in-CE-i.patch Normal file
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File diff suppressed because it is too large Load Diff

1348
0026-cipher-add-support-for-SM4-CFB-and-XTS-modes-in-CE-i.patch Normal file
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File diff suppressed because it is too large Load Diff

348
0027-cipher-add-support-for-SM4-ECB-algorithm-in-CE-instr.patch Normal file
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@ -0,0 +1,348 @@
From 6e66b445df0d39b9e796d1a4afcbe617197278de Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Wed, 20 Mar 2024 16:13:45 +0800
Subject: [PATCH 27/44] cipher: add support for SM4(ECB) algorithm in CE
instruction
Provides the CE acceleration instruction (Crypto-Extension)
to accelerate the execution of the SM4(ECB) algorithm.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/isa_ce_sm4.c | 17 +++
drv/isa_ce_sm4.h | 2 +
drv/isa_ce_sm4_armv8.S | 263 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 282 insertions(+)
diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c
index 466b060..ccab8fb 100644
--- a/drv/isa_ce_sm4.c
+++ b/drv/isa_ce_sm4.c
@@ -128,6 +128,16 @@ static void sm4_cbc_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rke
sm4_v8_cbc_encrypt(msg->in, msg->out, msg->in_bytes, rkey_dec, msg->iv, SM4_DECRYPT);
}
+static void sm4_ecb_encrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey_enc)
+{
+ sm4_v8_ecb_encrypt(msg->in, msg->out, msg->in_bytes, rkey_enc, SM4_ENCRYPT);
+}
+
+static void sm4_ecb_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey_dec)
+{
+ sm4_v8_ecb_encrypt(msg->in, msg->out, msg->in_bytes, rkey_dec, SM4_DECRYPT);
+}
+
void sm4_set_encrypt_key(const __u8 *userKey, struct SM4_KEY *key)
{
sm4_v8_set_encrypt_key(userKey, key);
@@ -254,6 +264,12 @@ static int isa_ce_cipher_send(struct wd_alg_driver *drv, handle_t ctx, void *wd_
sm4_set_decrypt_key(msg->key, &rkey);
switch (msg->mode) {
+ case WD_CIPHER_ECB:
+ if (msg->op_type == WD_CIPHER_ENCRYPTION)
+ sm4_ecb_encrypt(msg, &rkey);
+ else
+ sm4_ecb_decrypt(msg, &rkey);
+ break;
case WD_CIPHER_CBC:
if (msg->op_type == WD_CIPHER_ENCRYPTION)
sm4_cbc_encrypt(msg, &rkey);
@@ -317,6 +333,7 @@ static struct wd_alg_driver cipher_alg_driver[] = {
GEN_CE_ALG_DRIVER("ctr(sm4)", cipher),
GEN_CE_ALG_DRIVER("cfb(sm4)", cipher),
GEN_CE_ALG_DRIVER("xts(sm4)", cipher),
+ GEN_CE_ALG_DRIVER("ecb(sm4)", cipher),
};
static void __attribute__((constructor)) isa_ce_probe(void)
diff --git a/drv/isa_ce_sm4.h b/drv/isa_ce_sm4.h
index d92069f..d10b0af 100644
--- a/drv/isa_ce_sm4.h
+++ b/drv/isa_ce_sm4.h
@@ -28,6 +28,8 @@ void sm4_v8_set_decrypt_key(const unsigned char *userKey, struct SM4_KEY *key);
void sm4_v8_cbc_encrypt(const unsigned char *in, unsigned char *out,
size_t length, const struct SM4_KEY *key,
unsigned char *ivec, const int enc);
+void sm4_v8_ecb_encrypt(const unsigned char *in, unsigned char *out,
+ size_t length, const struct SM4_KEY *key, const int enc);
void sm4_v8_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out,
size_t len, const void *key, const unsigned char ivec[16]);
diff --git a/drv/isa_ce_sm4_armv8.S b/drv/isa_ce_sm4_armv8.S
index 342dfa5..7d84496 100644
--- a/drv/isa_ce_sm4_armv8.S
+++ b/drv/isa_ce_sm4_armv8.S
@@ -506,6 +506,269 @@ sm4_v8_cbc_encrypt:
ldp d8,d9,[sp],#16
ret
.size sm4_v8_cbc_encrypt,.-sm4_v8_cbc_encrypt
+.globl sm4_v8_ecb_encrypt
+.type sm4_v8_ecb_encrypt,%function
+.align 5
+sm4_v8_ecb_encrypt:
+ AARCH64_VALID_CALL_TARGET
+ ld1 {v0.4s,v1.4s,v2.4s,v3.4s},[x3],#64
+ ld1 {v4.4s,v5.4s,v6.4s,v7.4s},[x3]
+1:
+ cmp x2,#64
+ b.lt 1f
+ ld1 {v16.4s,v17.4s,v18.4s,v19.4s},[x0],#64
+ cmp x2,#128
+ b.lt 2f
+ ld1 {v20.4s,v21.4s,v22.4s,v23.4s},[x0],#64
+ // 8 blocks
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v17.16b,v17.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v18.16b,v18.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v19.16b,v19.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v20.16b,v20.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v21.16b,v21.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v22.16b,v22.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v23.16b,v23.16b
+#endif
+ sm4e v16.4s,v0.4s;
+ sm4e v17.4s,v0.4s;
+ sm4e v18.4s,v0.4s;
+ sm4e v19.4s,v0.4s;
+
+ sm4e v16.4s,v1.4s;
+ sm4e v17.4s,v1.4s;
+ sm4e v18.4s,v1.4s;
+ sm4e v19.4s,v1.4s;
+
+ sm4e v16.4s,v2.4s;
+ sm4e v17.4s,v2.4s;
+ sm4e v18.4s,v2.4s;
+ sm4e v19.4s,v2.4s;
+
+ sm4e v16.4s,v3.4s;
+ sm4e v17.4s,v3.4s;
+ sm4e v18.4s,v3.4s;
+ sm4e v19.4s,v3.4s;
+
+ sm4e v16.4s,v4.4s;
+ sm4e v17.4s,v4.4s;
+ sm4e v18.4s,v4.4s;
+ sm4e v19.4s,v4.4s;
+
+ sm4e v16.4s,v5.4s;
+ sm4e v17.4s,v5.4s;
+ sm4e v18.4s,v5.4s;
+ sm4e v19.4s,v5.4s;
+
+ sm4e v16.4s,v6.4s;
+ sm4e v17.4s,v6.4s;
+ sm4e v18.4s,v6.4s;
+ sm4e v19.4s,v6.4s;
+
+ sm4e v16.4s,v7.4s;
+ rev64 v16.4S,v16.4S
+ sm4e v17.4s,v7.4s;
+ ext v16.16b,v16.16b,v16.16b,#8
+ rev64 v17.4S,v17.4S
+ sm4e v18.4s,v7.4s;
+ ext v17.16b,v17.16b,v17.16b,#8
+ rev64 v18.4S,v18.4S
+ sm4e v19.4s,v7.4s;
+ ext v18.16b,v18.16b,v18.16b,#8
+ rev64 v19.4S,v19.4S
+ ext v19.16b,v19.16b,v19.16b,#8
+ sm4e v20.4s,v0.4s;
+ sm4e v21.4s,v0.4s;
+ sm4e v22.4s,v0.4s;
+ sm4e v23.4s,v0.4s;
+
+ sm4e v20.4s,v1.4s;
+ sm4e v21.4s,v1.4s;
+ sm4e v22.4s,v1.4s;
+ sm4e v23.4s,v1.4s;
+
+ sm4e v20.4s,v2.4s;
+ sm4e v21.4s,v2.4s;
+ sm4e v22.4s,v2.4s;
+ sm4e v23.4s,v2.4s;
+
+ sm4e v20.4s,v3.4s;
+ sm4e v21.4s,v3.4s;
+ sm4e v22.4s,v3.4s;
+ sm4e v23.4s,v3.4s;
+
+ sm4e v20.4s,v4.4s;
+ sm4e v21.4s,v4.4s;
+ sm4e v22.4s,v4.4s;
+ sm4e v23.4s,v4.4s;
+
+ sm4e v20.4s,v5.4s;
+ sm4e v21.4s,v5.4s;
+ sm4e v22.4s,v5.4s;
+ sm4e v23.4s,v5.4s;
+
+ sm4e v20.4s,v6.4s;
+ sm4e v21.4s,v6.4s;
+ sm4e v22.4s,v6.4s;
+ sm4e v23.4s,v6.4s;
+
+ sm4e v20.4s,v7.4s;
+ rev64 v20.4S,v20.4S
+ sm4e v21.4s,v7.4s;
+ ext v20.16b,v20.16b,v20.16b,#8
+ rev64 v21.4S,v21.4S
+ sm4e v22.4s,v7.4s;
+ ext v21.16b,v21.16b,v21.16b,#8
+ rev64 v22.4S,v22.4S
+ sm4e v23.4s,v7.4s;
+ ext v22.16b,v22.16b,v22.16b,#8
+ rev64 v23.4S,v23.4S
+ ext v23.16b,v23.16b,v23.16b,#8
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v17.16b,v17.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v18.16b,v18.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v19.16b,v19.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v20.16b,v20.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v21.16b,v21.16b
+#endif
+ st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
+#ifndef __ARMEB__
+ rev32 v22.16b,v22.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v23.16b,v23.16b
+#endif
+ st1 {v20.4s,v21.4s,v22.4s,v23.4s},[x1],#64
+ subs x2,x2,#128
+ b.gt 1b
+ ret
+ // 4 blocks
+2:
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v17.16b,v17.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v18.16b,v18.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v19.16b,v19.16b
+#endif
+ sm4e v16.4s,v0.4s;
+ sm4e v17.4s,v0.4s;
+ sm4e v18.4s,v0.4s;
+ sm4e v19.4s,v0.4s;
+
+ sm4e v16.4s,v1.4s;
+ sm4e v17.4s,v1.4s;
+ sm4e v18.4s,v1.4s;
+ sm4e v19.4s,v1.4s;
+
+ sm4e v16.4s,v2.4s;
+ sm4e v17.4s,v2.4s;
+ sm4e v18.4s,v2.4s;
+ sm4e v19.4s,v2.4s;
+
+ sm4e v16.4s,v3.4s;
+ sm4e v17.4s,v3.4s;
+ sm4e v18.4s,v3.4s;
+ sm4e v19.4s,v3.4s;
+
+ sm4e v16.4s,v4.4s;
+ sm4e v17.4s,v4.4s;
+ sm4e v18.4s,v4.4s;
+ sm4e v19.4s,v4.4s;
+
+ sm4e v16.4s,v5.4s;
+ sm4e v17.4s,v5.4s;
+ sm4e v18.4s,v5.4s;
+ sm4e v19.4s,v5.4s;
+
+ sm4e v16.4s,v6.4s;
+ sm4e v17.4s,v6.4s;
+ sm4e v18.4s,v6.4s;
+ sm4e v19.4s,v6.4s;
+
+ sm4e v16.4s,v7.4s;
+ rev64 v16.4S,v16.4S
+ sm4e v17.4s,v7.4s;
+ ext v16.16b,v16.16b,v16.16b,#8
+ rev64 v17.4S,v17.4S
+ sm4e v18.4s,v7.4s;
+ ext v17.16b,v17.16b,v17.16b,#8
+ rev64 v18.4S,v18.4S
+ sm4e v19.4s,v7.4s;
+ ext v18.16b,v18.16b,v18.16b,#8
+ rev64 v19.4S,v19.4S
+ ext v19.16b,v19.16b,v19.16b,#8
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v17.16b,v17.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v18.16b,v18.16b
+#endif
+#ifndef __ARMEB__
+ rev32 v19.16b,v19.16b
+#endif
+ st1 {v16.4s,v17.4s,v18.4s,v19.4s},[x1],#64
+ subs x2,x2,#64
+ b.gt 1b
+1:
+ subs x2,x2,#16
+ b.lt 1f
+ ld1 {v16.4s},[x0],#16
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+ sm4e v16.4s,v0.4s;
+ sm4e v16.4s,v1.4s;
+ sm4e v16.4s,v2.4s;
+ sm4e v16.4s,v3.4s;
+ sm4e v16.4s,v4.4s;
+ sm4e v16.4s,v5.4s;
+ sm4e v16.4s,v6.4s;
+ sm4e v16.4s,v7.4s;
+ rev64 v16.4S,v16.4S
+ ext v16.16b,v16.16b,v16.16b,#8
+#ifndef __ARMEB__
+ rev32 v16.16b,v16.16b
+#endif
+ st1 {v16.4s},[x1],#16
+ b.ne 1b
+1:
+ ret
+.size sm4_v8_ecb_encrypt,.-sm4_v8_ecb_encrypt
.globl sm4_v8_ctr32_encrypt_blocks
.type sm4_v8_ctr32_encrypt_blocks,%function
.align 5
--
2.25.1

337
0028-uadk-cipher-isa_ce-support-SM4-cbc_cts-mode.patch Normal file
View File

@ -0,0 +1,337 @@
From 8c23969dacd7b1ae1b77c1118a8f895bec6fd165 Mon Sep 17 00:00:00 2001
From: Yang Shen <shenyang39@huawei.com>
Date: Wed, 20 Mar 2024 16:15:00 +0800
Subject: [PATCH 28/44] uadk/cipher: isa_ce - support SM4 cbc_cts mode
This patch implements the CE instruction using SM4 CBC_CTS modes.
Signed-off-by: Yang Shen <shenyang39@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/isa_ce_sm4.c | 91 +++++++++++++++++++++++++++-
drv/isa_ce_sm4.h | 24 +++++---
drv/isa_ce_sm4_armv8.S | 133 +++++++++++++++++++++++++++++++++++++++++
3 files changed, 238 insertions(+), 10 deletions(-)
diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c
index ccab8fb..6961471 100644
--- a/drv/isa_ce_sm4.c
+++ b/drv/isa_ce_sm4.c
@@ -128,6 +128,82 @@ static void sm4_cbc_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rke
sm4_v8_cbc_encrypt(msg->in, msg->out, msg->in_bytes, rkey_dec, msg->iv, SM4_DECRYPT);
}
+/*
+ * In some situations, the cts mode can use cbc mode instead to imporve performance.
+ */
+static int sm4_cts_cbc_instead(struct wd_cipher_msg *msg)
+{
+ if (msg->in_bytes == SM4_BLOCK_SIZE)
+ return true;
+
+ if (!(msg->in_bytes % SM4_BLOCK_SIZE) && msg->mode != WD_CIPHER_CBC_CS3)
+ return true;
+
+ return false;
+}
+
+static void sm4_cts_cs1_mode_adapt(__u8 *cts_in, __u8 *cts_out,
+ const __u32 cts_bytes, const int enc)
+{
+ __u32 rsv_bytes = cts_bytes % SM4_BLOCK_SIZE;
+ __u8 blocks[SM4_BLOCK_SIZE] = {0};
+
+ if (enc == SM4_ENCRYPT) {
+ memcpy(blocks, cts_out, SM4_BLOCK_SIZE);
+ memcpy(cts_out, cts_out + SM4_BLOCK_SIZE, rsv_bytes);
+ memcpy(cts_out + rsv_bytes, blocks, SM4_BLOCK_SIZE);
+ } else {
+ memcpy(blocks, cts_in + rsv_bytes, SM4_BLOCK_SIZE);
+ memcpy(cts_in + SM4_BLOCK_SIZE, cts_in, rsv_bytes);
+ memcpy(cts_in, blocks, SM4_BLOCK_SIZE);
+ }
+}
+
+static void sm4_cts_cbc_crypt(struct wd_cipher_msg *msg,
+ const struct SM4_KEY *rkey_enc, const int enc)
+{
+ enum wd_cipher_mode mode = msg->mode;
+ __u32 in_bytes = msg->in_bytes;
+ __u8 *cts_in, *cts_out;
+ __u32 cts_bytes;
+
+ if (sm4_cts_cbc_instead(msg))
+ return sm4_v8_cbc_encrypt(msg->in, msg->out, in_bytes, rkey_enc, msg->iv, enc);
+
+ cts_bytes = in_bytes % SM4_BLOCK_SIZE + SM4_BLOCK_SIZE;
+ if (cts_bytes == SM4_BLOCK_SIZE)
+ cts_bytes += SM4_BLOCK_SIZE;
+
+ in_bytes -= cts_bytes;
+ if (in_bytes)
+ sm4_v8_cbc_encrypt(msg->in, msg->out, in_bytes, rkey_enc, msg->iv, enc);
+
+ cts_in = msg->in + in_bytes;
+ cts_out = msg->out + in_bytes;
+
+ if (enc == SM4_ENCRYPT) {
+ sm4_v8_cbc_cts_encrypt(cts_in, cts_out, cts_bytes, rkey_enc, msg->iv);
+
+ if (mode == WD_CIPHER_CBC_CS1)
+ sm4_cts_cs1_mode_adapt(cts_in, cts_out, cts_bytes, enc);
+ } else {
+ if (mode == WD_CIPHER_CBC_CS1)
+ sm4_cts_cs1_mode_adapt(cts_in, cts_out, cts_bytes, enc);
+
+ sm4_v8_cbc_cts_decrypt(cts_in, cts_out, cts_bytes, rkey_enc, msg->iv);
+ }
+}
+
+static void sm4_cbc_cts_encrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey_enc)
+{
+ sm4_cts_cbc_crypt(msg, rkey_enc, SM4_ENCRYPT);
+}
+
+static void sm4_cbc_cts_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey_enc)
+{
+ sm4_cts_cbc_crypt(msg, rkey_enc, SM4_DECRYPT);
+}
+
static void sm4_ecb_encrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rkey_enc)
{
sm4_v8_ecb_encrypt(msg->in, msg->out, msg->in_bytes, rkey_enc, SM4_ENCRYPT);
@@ -138,12 +214,12 @@ static void sm4_ecb_decrypt(struct wd_cipher_msg *msg, const struct SM4_KEY *rke
sm4_v8_ecb_encrypt(msg->in, msg->out, msg->in_bytes, rkey_dec, SM4_DECRYPT);
}
-void sm4_set_encrypt_key(const __u8 *userKey, struct SM4_KEY *key)
+static void sm4_set_encrypt_key(const __u8 *userKey, struct SM4_KEY *key)
{
sm4_v8_set_encrypt_key(userKey, key);
}
-void sm4_set_decrypt_key(const __u8 *userKey, struct SM4_KEY *key)
+static void sm4_set_decrypt_key(const __u8 *userKey, struct SM4_KEY *key)
{
sm4_v8_set_decrypt_key(userKey, key);
}
@@ -276,6 +352,14 @@ static int isa_ce_cipher_send(struct wd_alg_driver *drv, handle_t ctx, void *wd_
else
sm4_cbc_decrypt(msg, &rkey);
break;
+ case WD_CIPHER_CBC_CS1:
+ case WD_CIPHER_CBC_CS2:
+ case WD_CIPHER_CBC_CS3:
+ if (msg->op_type == WD_CIPHER_ENCRYPTION)
+ sm4_cbc_cts_encrypt(msg, &rkey);
+ else
+ sm4_cbc_cts_decrypt(msg, &rkey);
+ break;
case WD_CIPHER_CTR:
sm4_ctr_encrypt(msg, &rkey);
break;
@@ -330,6 +414,9 @@ static int cipher_recv(struct wd_alg_driver *drv, handle_t ctx, void *msg)
static struct wd_alg_driver cipher_alg_driver[] = {
GEN_CE_ALG_DRIVER("cbc(sm4)", cipher),
+ GEN_CE_ALG_DRIVER("cbc-cs1(sm4)", cipher),
+ GEN_CE_ALG_DRIVER("cbc-cs2(sm4)", cipher),
+ GEN_CE_ALG_DRIVER("cbc-cs3(sm4)", cipher),
GEN_CE_ALG_DRIVER("ctr(sm4)", cipher),
GEN_CE_ALG_DRIVER("cfb(sm4)", cipher),
GEN_CE_ALG_DRIVER("xts(sm4)", cipher),
diff --git a/drv/isa_ce_sm4.h b/drv/isa_ce_sm4.h
index d10b0af..308619e 100644
--- a/drv/isa_ce_sm4.h
+++ b/drv/isa_ce_sm4.h
@@ -25,27 +25,35 @@ struct sm4_ce_drv_ctx {
void sm4_v8_set_encrypt_key(const unsigned char *userKey, struct SM4_KEY *key);
void sm4_v8_set_decrypt_key(const unsigned char *userKey, struct SM4_KEY *key);
+
void sm4_v8_cbc_encrypt(const unsigned char *in, unsigned char *out,
size_t length, const struct SM4_KEY *key,
unsigned char *ivec, const int enc);
+void sm4_v8_cbc_cts_encrypt(const unsigned char *in, unsigned char *out,
+ size_t len, const void *key, const unsigned char ivec[16]);
+void sm4_v8_cbc_cts_decrypt(const unsigned char *in, unsigned char *out,
+ size_t len, const void *key, const unsigned char ivec[16]);
+
void sm4_v8_ecb_encrypt(const unsigned char *in, unsigned char *out,
size_t length, const struct SM4_KEY *key, const int enc);
+
void sm4_v8_ctr32_encrypt_blocks(const unsigned char *in, unsigned char *out,
- size_t len, const void *key, const unsigned char ivec[16]);
+ size_t len, const void *key, const unsigned char ivec[16]);
void sm4_v8_cfb_encrypt_blocks(const unsigned char *in, unsigned char *out,
- size_t length, const struct SM4_KEY *key, unsigned char *ivec);
+ size_t length, const struct SM4_KEY *key, unsigned char *ivec);
void sm4_v8_cfb_decrypt_blocks(const unsigned char *in, unsigned char *out,
- size_t length, const struct SM4_KEY *key, unsigned char *ivec);
+ size_t length, const struct SM4_KEY *key, unsigned char *ivec);
+
void sm4_v8_crypt_block(const unsigned char *in, unsigned char *out,
- const struct SM4_KEY *key);
+ const struct SM4_KEY *key);
int sm4_v8_xts_encrypt(const unsigned char *in, unsigned char *out, size_t length,
- const struct SM4_KEY *key, unsigned char *ivec,
- const struct SM4_KEY *key2);
+ const struct SM4_KEY *key, unsigned char *ivec,
+ const struct SM4_KEY *key2);
int sm4_v8_xts_decrypt(const unsigned char *in, unsigned char *out, size_t length,
- const struct SM4_KEY *key, unsigned char *ivec,
- const struct SM4_KEY *key2);
+ const struct SM4_KEY *key, unsigned char *ivec,
+ const struct SM4_KEY *key2);
#ifdef __cplusplus
}
diff --git a/drv/isa_ce_sm4_armv8.S b/drv/isa_ce_sm4_armv8.S
index 7d84496..6ebf39b 100644
--- a/drv/isa_ce_sm4_armv8.S
+++ b/drv/isa_ce_sm4_armv8.S
@@ -506,6 +506,139 @@ sm4_v8_cbc_encrypt:
ldp d8,d9,[sp],#16
ret
.size sm4_v8_cbc_encrypt,.-sm4_v8_cbc_encrypt
+
+.globl sm4_v8_cbc_cts_encrypt
+.type sm4_v8_cbc_cts_encrypt,%function
+.align 5
+sm4_v8_cbc_cts_encrypt:
+ AARCH64_VALID_CALL_TARGET
+ ld1 {v0.4s,v1.4s,v2.4s,v3.4s}, [x3], #64
+ ld1 {v4.4s,v5.4s,v6.4s,v7.4s}, [x3]
+ sub x5, x2, #16
+
+ ld1 {v8.4s}, [x4]
+
+ ld1 {v10.4s}, [x0]
+ eor v8.16b, v8.16b, v10.16b
+ rev32 v8.16b, v8.16b;
+ sm4e v8.4s, v0.4s;
+ sm4e v8.4s, v1.4s;
+ sm4e v8.4s, v2.4s;
+ sm4e v8.4s, v3.4s;
+ sm4e v8.4s, v4.4s;
+ sm4e v8.4s, v5.4s;
+ sm4e v8.4s, v6.4s;
+ sm4e v8.4s, v7.4s;
+ rev64 v8.4s, v8.4s;
+ ext v8.16b, v8.16b, v8.16b, #8;
+ rev32 v8.16b, v8.16b;
+
+ /* load permute table */
+ adr x6, .cts_permute_table
+ add x7, x6, #32
+ add x6, x6, x5
+ sub x7, x7, x5
+ ld1 {v13.4s}, [x6]
+ ld1 {v14.4s}, [x7]
+
+ /* overlapping loads */
+ add x0, x0, x5
+ ld1 {v11.4s}, [x0]
+
+ /* create Cn from En-1 */
+ tbl v10.16b, {v8.16b}, v13.16b
+ /* padding Pn with zeros */
+ tbl v11.16b, {v11.16b}, v14.16b
+
+ eor v11.16b, v11.16b, v8.16b
+ rev32 v11.16b, v11.16b;
+ sm4e v11.4s, v0.4s;
+ sm4e v11.4s, v1.4s;
+ sm4e v11.4s, v2.4s;
+ sm4e v11.4s, v3.4s;
+ sm4e v11.4s, v4.4s;
+ sm4e v11.4s, v5.4s;
+ sm4e v11.4s, v6.4s;
+ sm4e v11.4s, v7.4s;
+ rev64 v11.4s, v11.4s;
+ ext v11.16b, v11.16b, v11.16b, #8;
+ rev32 v11.16b, v11.16b;
+
+ /* overlapping stores */
+ add x5, x1, x5
+ st1 {v10.16b}, [x5]
+ st1 {v11.16b}, [x1]
+
+ ret
+.size sm4_v8_cbc_cts_encrypt,.-sm4_v8_cbc_cts_encrypt
+
+.globl sm4_v8_cbc_cts_decrypt
+.type sm4_v8_cbc_cts_decrypt,%function
+.align 5
+sm4_v8_cbc_cts_decrypt:
+ AARCH64_VALID_CALL_TARGET
+ ld1 {v0.4s,v1.4s,v2.4s,v3.4s}, [x3], #64
+ ld1 {v4.4s,v5.4s,v6.4s,v7.4s}, [x3]
+
+ sub x5, x2, #16
+
+ ld1 {v8.4s}, [x4]
+
+ /* load permute table */
+ adr x6, .cts_permute_table
+ add x7, x6, #32
+ add x6, x6, x5
+ sub x7, x7, x5
+ ld1 {v13.4s}, [x6]
+ ld1 {v14.4s}, [x7]
+
+ /* overlapping loads */
+ ld1 {v10.16b}, [x0], x5
+ ld1 {v11.16b}, [x0]
+
+ rev32 v10.16b, v10.16b;
+ sm4e v10.4s, v0.4s;
+ sm4e v10.4s, v1.4s;
+ sm4e v10.4s, v2.4s;
+ sm4e v10.4s, v3.4s;
+ sm4e v10.4s, v4.4s;
+ sm4e v10.4s, v5.4s;
+ sm4e v10.4s, v6.4s;
+ sm4e v10.4s, v7.4s;
+ rev64 v10.4s, v10.4s;
+ ext v10.16b, v10.16b, v10.16b, #8;
+ rev32 v10.16b, v10.16b;
+
+ /* select the first Ln bytes of Xn to create Pn */
+ tbl v12.16b, {v10.16b}, v13.16b
+ eor v12.16b, v12.16b, v11.16b
+
+ /* overwrite the first Ln bytes with Cn to create En-1 */
+ tbx v10.16b, {v11.16b}, v14.16b
+
+ rev32 v10.16b, v10.16b;
+ sm4e v10.4s, v0.4s;
+ sm4e v10.4s, v1.4s;
+ sm4e v10.4s, v2.4s;
+ sm4e v10.4s, v3.4s;
+ sm4e v10.4s, v4.4s;
+ sm4e v10.4s, v5.4s;
+ sm4e v10.4s, v6.4s;
+ sm4e v10.4s, v7.4s;
+ rev64 v10.4s, v10.4s;
+ ext v10.16b, v10.16b, v10.16b, #8;
+ rev32 v10.16b, v10.16b;
+
+ eor v10.16b, v10.16b, v8.16b
+
+ /* overlapping stores */
+ add x5, x1, x5
+ st1 {v12.16b}, [x5]
+ st1 {v10.16b}, [x1]
+
+ ret
+.size sm4_v8_cbc_cts_decrypt,.-sm4_v8_cbc_cts_decrypt
+
.globl sm4_v8_ecb_encrypt
.type sm4_v8_ecb_encrypt,%function
.align 5
--
2.25.1

49
0029-uadk-wd_alg-check-whether-the-platform-supports-SVE.patch Normal file
View File

@ -0,0 +1,49 @@
From 4163f4f6ff8534b171c8b1b044452b930629576d Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 23 Mar 2024 17:54:16 +0800
Subject: [PATCH 29/44] uadk/wd_alg: check whether the platform supports SVE
If the algorithm uses the SVE instruction, check whether
the platform supports SVE before algorithm driver registration.
If the platform does not support SVE, do not register the algorithm.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
wd_alg.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/wd_alg.c b/wd_alg.c
index f34a407..de352d7 100644
--- a/wd_alg.c
+++ b/wd_alg.c
@@ -109,6 +109,19 @@ static bool wd_check_ce_support(const char *dev_name)
return false;
}
+static bool wd_check_sve_support(void)
+{
+ unsigned long hwcaps = 0;
+
+ #if defined(__aarch64__)
+ hwcaps = getauxval(AT_HWCAP);
+ #endif
+ if (hwcaps & HWCAP_SVE)
+ return true;
+
+ return false;
+}
+
static bool wd_alg_check_available(int calc_type, const char *dev_name)
{
bool ret = false;
@@ -122,6 +135,7 @@ static bool wd_alg_check_available(int calc_type, const char *dev_name)
break;
/* Should find the CPU if not support SVE */
case UADK_ALG_SVE_INSTR:
+ ret = wd_check_sve_support();
break;
/* Check if the current driver has device support */
case UADK_ALG_HW:
--
2.25.1

34
0030-uadk-sched-fix-async-mode-ctx-id.patch Normal file
View File

@ -0,0 +1,34 @@
From 6ab956dc04c04849d2650e08d59b9722522eb201 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 23 Mar 2024 17:56:17 +0800
Subject: [PATCH 30/44] uadk/sched: fix async mode ctx id
In the single scheduler scenario, ctx id 1 is asynchronous ctx,
but the function sched_single_poll_policy() uses ctx id 0.
As a result, packets fail to be received. Change the value of
ctx id to 1.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
wd_sched.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/wd_sched.c b/wd_sched.c
index b43834d..6766872 100644
--- a/wd_sched.c
+++ b/wd_sched.c
@@ -428,9 +428,9 @@ static int sched_single_poll_policy(handle_t h_sched_ctx,
}
while (loop_times > 0) {
- /* Default async mode use ctx 0 */
+ /* Default async mode use ctx 1 */
loop_times--;
- ret = sched_ctx->poll_func(0, 1, &poll_num);
+ ret = sched_ctx->poll_func(1, 1, &poll_num);
if ((ret < 0) && (ret != -EAGAIN))
return ret;
else if (ret == -EAGAIN)
--
2.25.1

169
0031-uadk-initializes-ctx-resources-in-SVE-mode.patch Normal file
View File

@ -0,0 +1,169 @@
From 4516c0f35532713548f4ccd016c562359c713eb4 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 23 Mar 2024 17:57:12 +0800
Subject: [PATCH 31/44] uadk: initializes ctx resources in SVE mode
Initializes ctx resources in SVE mode. In addition, when the driver
is released, the config resources need to be released in all modes,
not only UADK_ALG_HW.
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
include/wd_alg_common.h | 4 ++
wd_util.c | 95 +++++++++++++++++++++++++++++++++++------
2 files changed, 85 insertions(+), 14 deletions(-)
diff --git a/include/wd_alg_common.h b/include/wd_alg_common.h
index 32b8630..5fee085 100644
--- a/include/wd_alg_common.h
+++ b/include/wd_alg_common.h
@@ -127,6 +127,10 @@ struct wd_ctx_params {
struct wd_cap_config *cap;
};
+struct wd_soft_ctx {
+ void *priv;
+};
+
struct wd_ctx_internal {
handle_t ctx;
__u8 op_type;
diff --git a/wd_util.c b/wd_util.c
index fb58167..1e2b190 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -28,6 +28,10 @@
#define US2S(us) ((us) >> 20)
#define WD_INIT_RETRY_TIMEOUT 3
+#define WD_SOFT_CTX_NUM 2
+#define WD_SOFT_SYNC_CTX 0
+#define WD_SOFT_ASYNC_CTX 1
+
#define WD_DRV_LIB_DIR "uadk"
struct msg_pool {
@@ -1968,8 +1972,7 @@ void wd_alg_uninit_driver(struct wd_ctx_config_internal *config,
driver->exit(driver);
/* Ctx config just need clear once */
- if (driver->calc_type == UADK_ALG_HW)
- wd_clear_ctx_config(config);
+ wd_clear_ctx_config(config);
if (driver->fallback)
wd_alg_uninit_fallback((struct wd_alg_driver *)driver->fallback);
@@ -2660,6 +2663,47 @@ static void wd_alg_ctx_uninit(struct wd_ctx_config *ctx_config)
free(ctx_config->ctxs);
}
+static int wd_alg_init_sve_ctx(struct wd_ctx_config *ctx_config)
+{
+ struct wd_soft_ctx *ctx_sync, *ctx_async;
+
+ ctx_config->ctx_num = WD_SOFT_CTX_NUM;
+ ctx_config->ctxs = calloc(ctx_config->ctx_num, sizeof(struct wd_ctx));
+ if (!ctx_config->ctxs)
+ return -WD_ENOMEM;
+
+ ctx_sync = calloc(1, sizeof(struct wd_soft_ctx));
+ if (!ctx_sync)
+ goto free_ctxs;
+
+ ctx_config->ctxs[WD_SOFT_SYNC_CTX].op_type = 0;
+ ctx_config->ctxs[WD_SOFT_SYNC_CTX].ctx_mode = CTX_MODE_SYNC;
+ ctx_config->ctxs[WD_SOFT_SYNC_CTX].ctx = (handle_t)ctx_sync;
+
+ ctx_async = calloc(1, sizeof(struct wd_soft_ctx));
+ if (!ctx_async)
+ goto free_ctx_sync;
+
+ ctx_config->ctxs[WD_SOFT_ASYNC_CTX].op_type = 0;
+ ctx_config->ctxs[WD_SOFT_ASYNC_CTX].ctx_mode = CTX_MODE_ASYNC;
+ ctx_config->ctxs[WD_SOFT_ASYNC_CTX].ctx = (handle_t)ctx_async;
+
+ return 0;
+
+free_ctx_sync:
+ free(ctx_sync);
+free_ctxs:
+ free(ctx_config->ctxs);
+ return -WD_ENOMEM;
+}
+
+static void wd_alg_uninit_sve_ctx(struct wd_ctx_config *ctx_config)
+{
+ free((struct wd_soft_ctx *)ctx_config->ctxs[WD_SOFT_ASYNC_CTX].ctx);
+ free((struct wd_soft_ctx *)ctx_config->ctxs[WD_SOFT_SYNC_CTX].ctx);
+ free(ctx_config->ctxs);
+}
+
int wd_alg_attrs_init(struct wd_init_attrs *attrs)
{
wd_alg_poll_ctx alg_poll_func = attrs->alg_poll_ctx;
@@ -2717,9 +2761,23 @@ int wd_alg_attrs_init(struct wd_init_attrs *attrs)
}
attrs->sched = alg_sched;
- ret = wd_sched_rr_instance(alg_sched, NULL);
+ ctx_config = calloc(1, sizeof(*ctx_config));
+ if (!ctx_config) {
+ WD_ERR("fail to alloc ctx config\n");
+ goto out_freesched;
+ }
+ attrs->ctx_config = ctx_config;
+
+ ret = wd_alg_init_sve_ctx(ctx_config);
if (ret) {
- WD_ERR("fail to instance scheduler\n");
+ WD_ERR("fail to init sve ctx!\n");
+ goto out_freesched;
+ }
+
+ ctx_config->cap = attrs->ctx_params->cap;
+ ret = alg_init_func(ctx_config, alg_sched);
+ if (ret) {
+ wd_alg_uninit_sve_ctx(ctx_config);
goto out_freesched;
}
break;
@@ -2780,17 +2838,26 @@ void wd_alg_attrs_uninit(struct wd_init_attrs *attrs)
struct wd_sched *alg_sched = attrs->sched;
int driver_type = attrs->driver->calc_type;
- if (driver_type == UADK_ALG_CE_INSTR || driver_type == UADK_ALG_SOFT) {
- if (ctx_config) {
- wd_alg_ce_ctx_uninit(ctx_config);
- free(ctx_config);
- }
- } else {
- if (ctx_config) {
- wd_alg_ctx_uninit(ctx_config);
- free(ctx_config);
- }
+ if (!ctx_config) {
+ wd_sched_rr_release(alg_sched);
+ return;
+ }
+
+ switch (driver_type) {
+ case UADK_ALG_SOFT:
+ case UADK_ALG_CE_INSTR:
+ wd_alg_ce_ctx_uninit(ctx_config);
+ break;
+ case UADK_ALG_SVE_INSTR:
+ wd_alg_uninit_sve_ctx(ctx_config);
+ break;
+ case UADK_ALG_HW:
+ wd_alg_ctx_uninit(ctx_config);
+ break;
+ default:
+ break;
}
+ free(ctx_config);
wd_sched_rr_release(alg_sched);
}
--
2.25.1

4092
0032-uadk-hash_mb-support-multi-buffer-calculation-for-sm.patch Normal file
View File

File diff suppressed because it is too large Load Diff

38
0033-uadk_tool-fix-aead-performance-test-issue.patch Normal file
View File

@ -0,0 +1,38 @@
From f5787232f4f5cb09445bfc87d20cb2b43f5e5ea3 Mon Sep 17 00:00:00 2001
From: Longfang Liu <liulongfang@huawei.com>
Date: Mon, 11 Mar 2024 16:14:34 +0800
Subject: [PATCH 33/44] uadk_tool: fix aead performance test issue
In the current UADK code, due to the new support for aead stream mode,
a new msg_state state has been added. If the initial value is not
assigned, an error will occur in the block mode check.
As a result, the performance test cannot be executed.
Signed-off-by: Longfang Liu <liulongfang@huawei.com>
---
uadk_tool/benchmark/sec_uadk_benchmark.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index c99ae89..92e967a 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -1165,6 +1165,7 @@ static void *sec_uadk_aead_async(void *arg)
areq.mac_bytes = auth_size;
areq.assoc_bytes = SEC_AEAD_LEN;
areq.in_bytes = g_pktlen;
+ areq.msg_state = 0;
if (pdata->is_union)
areq.mac_bytes = 32;
if (areq.op_type) // decrypto
@@ -1396,6 +1397,7 @@ static void *sec_uadk_aead_sync(void *arg)
areq.assoc_bytes = SEC_AEAD_LEN;
areq.in_bytes = g_pktlen;
areq.mac_bytes = g_maclen;
+ areq.msg_state = 0;
if (areq.op_type) // decrypto
areq.out_bytes = g_pktlen + 16; // aadsize = 16;
else
--
2.25.1

100
0034-uadk_tool-fix-the-logic-for-counting-retransmissions.patch Normal file
View File

@ -0,0 +1,100 @@
From 12466753e870b9577826d238e08a744c17267a8f Mon Sep 17 00:00:00 2001
From: Chenghai Huang <huangchenghai2@huawei.com>
Date: Mon, 11 Mar 2024 16:19:46 +0800
Subject: [PATCH 34/44] uadk_tool: fix the logic for counting retransmissions
when busy
The try cnt should be set to 0 after the packet is successfully
sent, not after BUSY is returned.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
---
uadk_tool/benchmark/zip_uadk_benchmark.c | 8 ++++----
uadk_tool/benchmark/zip_wd_benchmark.c | 7 +++----
2 files changed, 7 insertions(+), 8 deletions(-)
diff --git a/uadk_tool/benchmark/zip_uadk_benchmark.c b/uadk_tool/benchmark/zip_uadk_benchmark.c
index 435c0b4..9681c22 100644
--- a/uadk_tool/benchmark/zip_uadk_benchmark.c
+++ b/uadk_tool/benchmark/zip_uadk_benchmark.c
@@ -817,9 +817,8 @@ static void *zip_uadk_blk_lz77_async_run(void *arg)
while(1) {
if (get_run_state() == 0)
- break;
+ break;
- try_cnt = 0;
i = count % MAX_POOL_LENTH_COMP;
creq.src = uadk_pool->bds[i].src;
creq.dst = &hw_buff_out[i]; //temp out
@@ -845,6 +844,7 @@ static void *zip_uadk_blk_lz77_async_run(void *arg)
} else if (ret || creq.status) {
break;
}
+ try_cnt = 0;
count++;
}
@@ -1037,9 +1037,8 @@ static void *zip_uadk_blk_async_run(void *arg)
while(1) {
if (get_run_state() == 0)
- break;
+ break;
- try_cnt = 0;
i = count % MAX_POOL_LENTH_COMP;
creq.src = uadk_pool->bds[i].src;
creq.dst = uadk_pool->bds[i].dst;
@@ -1062,6 +1061,7 @@ static void *zip_uadk_blk_async_run(void *arg)
} else if (ret || creq.status) {
break;
}
+ try_cnt = 0;
count++;
}
diff --git a/uadk_tool/benchmark/zip_wd_benchmark.c b/uadk_tool/benchmark/zip_wd_benchmark.c
index d2340e0..d7bafd6 100644
--- a/uadk_tool/benchmark/zip_wd_benchmark.c
+++ b/uadk_tool/benchmark/zip_wd_benchmark.c
@@ -708,9 +708,8 @@ static void *zip_wd_blk_lz77_async_run(void *arg)
while(1) {
if (get_run_state() == 0)
- break;
+ break;
- try_cnt = 0;
i = count % MAX_POOL_LENTH_COMP;
opdata.in = bd_pool[i].src;
opdata.out = bd_pool[i].dst; //temp out
@@ -737,6 +736,7 @@ static void *zip_wd_blk_lz77_async_run(void *arg)
opdata.status == WD_IN_EPARA || opdata.status == WD_VERIFY_ERR) {
break;
}
+ try_cnt = 0;
count++;
}
@@ -984,7 +984,6 @@ static void *zip_wd_blk_async_run(void *arg)
opdata.in_len = bd_pool[i].src_len;
opdata.avail_out = out_len;
- try_cnt = 0;
tag[i].ctx = ctx;
tag[i].td_id = pdata->td_id;
tag[i].bd_idx = i;
@@ -1002,7 +1001,7 @@ static void *zip_wd_blk_async_run(void *arg)
opdata.status == WD_IN_EPARA || opdata.status == WD_VERIFY_ERR) {
break;
}
-
+ try_cnt = 0;
count++;
}
--
2.25.1

119
0035-uadk-tools-support-the-nosva-test-of-a-specified-dev.patch Normal file
View File

@ -0,0 +1,119 @@
From 17e5f25df480a5cacc3ac5e8ae88b708786eec44 Mon Sep 17 00:00:00 2001
From: Chenghai Huang <huangchenghai2@huawei.com>
Date: Mon, 11 Mar 2024 16:22:58 +0800
Subject: [PATCH 35/44] uadk/tools - support the nosva test of a specified
device
Add the description of device parameters. The input should
use the device name from '/sys/class/uacce/<name>'. Only full
matching device names are supported.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
---
uadk_tool/benchmark/hpre_wd_benchmark.c | 8 ++++++++
uadk_tool/benchmark/sec_wd_benchmark.c | 8 ++++++++
uadk_tool/benchmark/trng_wd_benchmark.c | 8 ++++++++
uadk_tool/benchmark/uadk_benchmark.c | 3 +++
uadk_tool/benchmark/zip_wd_benchmark.c | 8 ++++++++
5 files changed, 35 insertions(+)
diff --git a/uadk_tool/benchmark/hpre_wd_benchmark.c b/uadk_tool/benchmark/hpre_wd_benchmark.c
index 2873ffd..6dc1269 100644
--- a/uadk_tool/benchmark/hpre_wd_benchmark.c
+++ b/uadk_tool/benchmark/hpre_wd_benchmark.c
@@ -431,6 +431,14 @@ static int init_hpre_wd_queue(struct acc_option *options)
/* nodemask need to be clean */
g_thread_queue.bd_res[i].queue->node_mask = 0x0;
memset(g_thread_queue.bd_res[i].queue->dev_path, 0x0, PATH_STR_SIZE);
+ if (strlen(options->device) != 0) {
+ ret = snprintf(g_thread_queue.bd_res[i].queue->dev_path,
+ PATH_STR_SIZE, "%s", options->device);
+ if (ret < 0) {
+ WD_ERR("failed to copy dev file path!\n");
+ return -WD_EINVAL;
+ }
+ }
ret = wd_request_queue(g_thread_queue.bd_res[i].queue);
if (ret) {
diff --git a/uadk_tool/benchmark/sec_wd_benchmark.c b/uadk_tool/benchmark/sec_wd_benchmark.c
index aa03db8..2ed8493 100644
--- a/uadk_tool/benchmark/sec_wd_benchmark.c
+++ b/uadk_tool/benchmark/sec_wd_benchmark.c
@@ -600,6 +600,14 @@ static int init_wd_queue(struct acc_option *options)
/* nodemask need to be clean */
g_thread_queue.bd_res[i].queue->node_mask = 0x0;
memset(g_thread_queue.bd_res[i].queue->dev_path, 0x0, PATH_STR_SIZE);
+ if (strlen(options->device) != 0) {
+ ret = snprintf(g_thread_queue.bd_res[i].queue->dev_path,
+ PATH_STR_SIZE, "%s", options->device);
+ if (ret < 0) {
+ WD_ERR("failed to copy dev file path!\n");
+ return -WD_EINVAL;
+ }
+ }
ret = wd_request_queue(g_thread_queue.bd_res[i].queue);
if (ret) {
diff --git a/uadk_tool/benchmark/trng_wd_benchmark.c b/uadk_tool/benchmark/trng_wd_benchmark.c
index 64942f0..3ce329a 100644
--- a/uadk_tool/benchmark/trng_wd_benchmark.c
+++ b/uadk_tool/benchmark/trng_wd_benchmark.c
@@ -51,6 +51,14 @@ static int init_trng_wd_queue(struct acc_option *options)
/* nodemask need to be clean */
g_thread_queue.bd_res[i].queue->node_mask = 0x0;
memset(g_thread_queue.bd_res[i].queue->dev_path, 0x0, PATH_STR_SIZE);
+ if (strlen(options->device) != 0) {
+ ret = snprintf(g_thread_queue.bd_res[i].queue->dev_path,
+ PATH_STR_SIZE, "%s", options->device);
+ if (ret < 0) {
+ WD_ERR("failed to copy dev file path!\n");
+ return -WD_EINVAL;
+ }
+ }
g_thread_queue.bd_res[i].in_bytes = options->pktlen;
g_thread_queue.bd_res[i].out = malloc(options->pktlen);
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index cf3a93c..0ebbb68 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -595,6 +595,7 @@ static void dump_param(struct acc_option *option)
ACC_TST_PRT(" [--engine]: %s\n", option->engine);
ACC_TST_PRT(" [--latency]: %u\n", option->latency);
ACC_TST_PRT(" [--init2]: %u\n", option->inittype);
+ ACC_TST_PRT(" [--device]: %s\n", option->device);
}
int acc_benchmark_run(struct acc_option *option)
@@ -718,6 +719,8 @@ static void print_help(void)
ACC_TST_PRT(" test the running time of packets\n");
ACC_TST_PRT(" [--init2]:\n");
ACC_TST_PRT(" select init2 mode in the init interface of UADK SVA\n");
+ ACC_TST_PRT(" [--device]:\n");
+ ACC_TST_PRT(" select device to do task\n");
ACC_TST_PRT(" [--help] = usage\n");
ACC_TST_PRT("Example\n");
ACC_TST_PRT(" ./uadk_tool benchmark --alg aes-128-cbc --mode sva --opt 0 --sync\n");
diff --git a/uadk_tool/benchmark/zip_wd_benchmark.c b/uadk_tool/benchmark/zip_wd_benchmark.c
index d7bafd6..4424e08 100644
--- a/uadk_tool/benchmark/zip_wd_benchmark.c
+++ b/uadk_tool/benchmark/zip_wd_benchmark.c
@@ -310,6 +310,14 @@ static int init_zip_wd_queue(struct acc_option *options)
/* nodemask need to be clean */
g_thread_queue.bd_res[i].queue->node_mask = 0x0;
memset(g_thread_queue.bd_res[i].queue->dev_path, 0x0, PATH_STR_SIZE);
+ if (strlen(options->device) != 0) {
+ ret = snprintf(g_thread_queue.bd_res[i].queue->dev_path,
+ PATH_STR_SIZE, "%s", options->device);
+ if (ret < 0) {
+ WD_ERR("failed to copy dev file path!\n");
+ return -WD_EINVAL;
+ }
+ }
ret = wd_request_queue(g_thread_queue.bd_res[i].queue);
if (ret) {
--
2.25.1

674
0036-uadk-tools-support-designated-device-testing.patch Normal file
View File

@ -0,0 +1,674 @@
From 829bc553310349ee7c654397204e8b348d7610f4 Mon Sep 17 00:00:00 2001
From: Yang Shen <shenyang39@huawei.com>
Date: Mon, 11 Mar 2024 16:27:04 +0800
Subject: [PATCH 36/44] uadk/tools - support designated device testing
Add a parameter 'device' to designate a device. The input should
use the device name from '/sys/class/uacce/<name>'. Only full
matching device names are supported.
Signed-off-by: Yang Shen <shenyang39@huawei.com>
---
uadk_tool/benchmark/hpre_uadk_benchmark.c | 86 ++++++++++++++-------
uadk_tool/benchmark/sec_uadk_benchmark.c | 86 ++++++++++++++-------
uadk_tool/benchmark/uadk_benchmark.c | 64 ++++++++-------
uadk_tool/benchmark/uadk_benchmark.h | 36 +++++----
uadk_tool/benchmark/zip_uadk_benchmark.c | 94 ++++++++++++++++-------
5 files changed, 237 insertions(+), 129 deletions(-)
diff --git a/uadk_tool/benchmark/hpre_uadk_benchmark.c b/uadk_tool/benchmark/hpre_uadk_benchmark.c
index 0cbbdf2..729728f 100644
--- a/uadk_tool/benchmark/hpre_uadk_benchmark.c
+++ b/uadk_tool/benchmark/hpre_uadk_benchmark.c
@@ -346,43 +346,66 @@ static int hpre_uadk_param_parse(thread_data *tddata, struct acc_option *options
static int init_hpre_ctx_config(struct acc_option *options)
{
+ struct uacce_dev_list *list, *tmp;
int subtype = options->subtype;
char *alg = options->algclass;
int mode = options->syncmode;
+ struct uacce_dev *dev = NULL;
struct sched_params param;
- struct uacce_dev *dev;
- int max_node;
+ int max_node, i;
+ char *dev_name;
int ret = 0;
- int i = 0;
max_node = numa_max_node() + 1;
if (max_node <= 0)
return -EINVAL;
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs)
- return -ENOMEM;
+ list = wd_get_accel_list(alg);
+ if (!list) {
+ HPRE_TST_PRT("failed to get %s device\n", alg);
+ return -ENODEV;
+ }
- while (i < g_ctxnum) {
- dev = wd_get_accel_dev(alg);
- if (!dev) {
- HPRE_TST_PRT("failed to get %s device\n", alg);
- ret = -EINVAL;
- goto out;
+ if (strlen(options->device) == 0) {
+ dev = list->dev;
+ } else {
+ for (tmp = list; tmp; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
+ }
}
+ }
- for (; i < g_ctxnum; i++) {
- g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
- if (!g_ctx_cfg.ctxs[i].ctx)
- break;
+ if (dev == NULL) {
+ HPRE_TST_PRT("failed to find device %s\n", options->device);
+ ret = -ENODEV;
+ goto free_list;
+ }
+
+ /* If there is no numa, we defualt config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
- g_ctx_cfg.ctxs[i].op_type = 0; // default op_type
- g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs) {
+ ret = -ENOMEM;
+ goto free_list;
+ }
+
+ for (i = 0; i < g_ctxnum; i++) {
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx) {
+ HPRE_TST_PRT("failed to alloc %dth ctx\n", i);
+ ret = -ENODEV;
+ goto free_ctx;
}
- free(dev);
+ g_ctx_cfg.ctxs[i].op_type = 0;
+ g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
switch(subtype) {
@@ -401,11 +424,11 @@ static int init_hpre_ctx_config(struct acc_option *options)
break;
default:
HPRE_TST_PRT("failed to parse alg subtype!\n");
- return -EINVAL;
+ goto free_ctx;
}
if (!g_sched) {
HPRE_TST_PRT("failed to alloc sched!\n");
- goto out;
+ goto free_ctx;
}
g_sched->name = SCHED_SINGLE;
@@ -417,7 +440,7 @@ static int init_hpre_ctx_config(struct acc_option *options)
ret = wd_sched_rr_instance(g_sched, &param);
if (ret) {
HPRE_TST_PRT("failed to fill hpre sched data!\n");
- goto out;
+ goto free_sched;
}
/* init */
@@ -438,17 +461,22 @@ static int init_hpre_ctx_config(struct acc_option *options)
}
if (ret) {
HPRE_TST_PRT("failed to get hpre ctx!\n");
- goto out;
+ goto free_sched;
}
return 0;
-out:
- for (i = i - 1; i >= 0; i--)
- wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
- free(g_ctx_cfg.ctxs);
+free_sched:
wd_sched_rr_release(g_sched);
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+ free(g_ctx_cfg.ctxs);
+
+free_list:
+ wd_free_list_accels(list);
+
return ret;
}
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index 92e967a..105fb1a 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -516,42 +516,66 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
static int init_ctx_config(struct acc_option *options)
{
+ struct uacce_dev_list *list, *tmp;
struct sched_params param = {0};
- struct uacce_dev *dev = NULL;
- char *alg = options->algclass;
int subtype = options->subtype;
+ char *alg = options->algclass;
int mode = options->syncmode;
- int max_node = 0;
+ struct uacce_dev *dev = NULL;
+ int max_node, i;
+ char *dev_name;
int ret = 0;
- int i = 0;
max_node = numa_max_node() + 1;
if (max_node <= 0)
return -EINVAL;
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs)
- return -ENOMEM;
+ list = wd_get_accel_list(alg);
+ if (!list) {
+ SEC_TST_PRT("failed to get %s device\n", alg);
+ return -ENODEV;
+ }
- while (i < g_ctxnum) {
- dev = wd_get_accel_dev(alg);
- if (!dev) {
- SEC_TST_PRT("failed to get %s device\n", alg);
- goto out;
+ if (strlen(options->device) == 0) {
+ dev = list->dev;
+ } else {
+ for (tmp = list; tmp; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
+ }
}
+ }
- for (; i < g_ctxnum; i++) {
- g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
- if (!g_ctx_cfg.ctxs[i].ctx)
- break;
+ if (dev == NULL) {
+ SEC_TST_PRT("failed to find device %s\n", options->device);
+ ret = -ENODEV;
+ goto free_list;
+ }
+
+ /* If there is no numa, we defualt config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs) {
+ ret = -ENOMEM;
+ goto free_list;
+ }
- g_ctx_cfg.ctxs[i].op_type = 0; // default op_type
- g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
+ for (i = 0; i < g_ctxnum; i++) {
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx) {
+ SEC_TST_PRT("failed to alloc %dth ctx\n", i);
+ ret = -ENOMEM;
+ goto free_ctx;
}
- free(dev);
+ g_ctx_cfg.ctxs[i].op_type = 0;
+ g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
switch(subtype) {
@@ -566,11 +590,11 @@ static int init_ctx_config(struct acc_option *options)
break;
default:
SEC_TST_PRT("failed to parse alg subtype!\n");
- return -EINVAL;
+ goto free_ctx;
}
if (!g_sched) {
SEC_TST_PRT("failed to alloc sched!\n");
- goto out;
+ goto free_ctx;
}
g_sched->name = SCHED_SINGLE;
@@ -582,7 +606,7 @@ static int init_ctx_config(struct acc_option *options)
ret = wd_sched_rr_instance(g_sched, &param);
if (ret) {
SEC_TST_PRT("failed to fill sched data!\n");
- goto out;
+ goto free_sched;
}
/* init */
@@ -599,17 +623,21 @@ static int init_ctx_config(struct acc_option *options)
}
if (ret) {
SEC_TST_PRT("failed to cipher ctx!\n");
- goto out;
+ goto free_sched;
}
return 0;
-out:
- for (i--; i >= 0; i--)
- wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+free_sched:
+ wd_sched_rr_release(g_sched);
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
free(g_ctx_cfg.ctxs);
- wd_sched_rr_release(g_sched);
+
+free_list:
+ wd_free_list_accels(list);
return ret;
}
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index 0ebbb68..5dbe26a 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -491,6 +491,7 @@ static void parse_alg_param(struct acc_option *option)
void cal_perfermance_data(struct acc_option *option, u32 sttime)
{
u8 palgname[MAX_ALG_NAME];
+ char *unit = "KiB/s";
double perfermance;
double cpu_rate;
u32 ttime = 1000;
@@ -506,8 +507,8 @@ void cal_perfermance_data(struct acc_option *option, u32 sttime)
if (option->syncmode == SYNC_MODE) {
if (get_recv_time() == option->threads)
break;
- } else { // ASYNC_MODE
- if (get_recv_time() == 1) // poll complete
+ } else {
+ if (get_recv_time() == 1)
break;
}
usleep(1000);
@@ -525,14 +526,17 @@ void cal_perfermance_data(struct acc_option *option, u32 sttime)
palgname[i] = '\0';
ptime = ptime - sttime;
+ cpu_rate = (double)ptime / option->times;
+
perfdata = g_recv_data.pkg_len * g_recv_data.recv_cnt / 1024.0;
- perfops = (double)(g_recv_data.recv_cnt) / 1000.0;
perfermance = perfdata / option->times;
+
+ perfops = g_recv_data.recv_cnt / 1000.0;
ops = perfops / option->times;
- cpu_rate = (double)ptime / option->times;
- ACC_TST_PRT("algname: length: perf: iops: CPU_rate:\n"
- "%s %-2uBytes %.1fKB/s %.1fKops %.2f%%\n",
- palgname, option->pktlen, perfermance, ops, cpu_rate);
+
+ ACC_TST_PRT("algname:\tlength:\t\tperf:\t\tiops:\t\tCPU_rate:\n"
+ "%s\t%-2uBytes \t%.2f%s\t%.1fKops \t%.2f%%\n",
+ palgname, option->pktlen, perfermance, unit, ops, cpu_rate);
}
static int benchmark_run(struct acc_option *option)
@@ -744,24 +748,25 @@ int acc_cmd_parse(int argc, char *argv[], struct acc_option *option)
int c;
static struct option long_options[] = {
- {"help", no_argument, 0, 0},
- {"alg", required_argument, 0, 1},
- {"mode", required_argument, 0, 2},
- {"opt", required_argument, 0, 3},
- {"sync", no_argument, 0, 4},
- {"async", no_argument, 0, 5},
- {"pktlen", required_argument, 0, 6},
- {"seconds", required_argument, 0, 7},
- {"thread", required_argument, 0, 8},
- {"multi", required_argument, 0, 9},
- {"ctxnum", required_argument, 0, 10},
- {"prefetch", no_argument, 0, 11},
- {"engine", required_argument, 0, 12},
- {"alglist", no_argument, 0, 13},
- {"latency", no_argument, 0, 14},
- {"winsize", required_argument, 0, 15},
- {"complevel", required_argument, 0, 16},
- {"init2", no_argument, 0, 17},
+ {"help", no_argument, 0, 0},
+ {"alg", required_argument, 0, 1},
+ {"mode", required_argument, 0, 2},
+ {"opt", required_argument, 0, 3},
+ {"sync", no_argument, 0, 4},
+ {"async", no_argument, 0, 5},
+ {"pktlen", required_argument, 0, 6},
+ {"seconds", required_argument, 0, 7},
+ {"thread", required_argument, 0, 8},
+ {"multi", required_argument, 0, 9},
+ {"ctxnum", required_argument, 0, 10},
+ {"prefetch", no_argument, 0, 11},
+ {"engine", required_argument, 0, 12},
+ {"alglist", no_argument, 0, 13},
+ {"latency", no_argument, 0, 14},
+ {"winsize", required_argument, 0, 15},
+ {"complevel", required_argument, 0, 16},
+ {"init2", no_argument, 0, 17},
+ {"device", required_argument, 0, 18},
{0, 0, 0, 0}
};
@@ -826,8 +831,15 @@ int acc_cmd_parse(int argc, char *argv[], struct acc_option *option)
case 17:
option->inittype = INIT2_TYPE;
break;
+ case 18:
+ if (strlen(optarg) >= MAX_DEVICE_NAME) {
+ ACC_TST_PRT("invalid: device name is %s\n", optarg);
+ goto to_exit;
+ }
+ strcpy(option->device, optarg);
+ break;
default:
- ACC_TST_PRT("bad input test parameter!\n");
+ ACC_TST_PRT("invalid: bad input parameter!\n");
print_help();
goto to_exit;
}
diff --git a/uadk_tool/benchmark/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h
index 1752948..fd3ebe5 100644
--- a/uadk_tool/benchmark/uadk_benchmark.h
+++ b/uadk_tool/benchmark/uadk_benchmark.h
@@ -6,27 +6,28 @@
#include <errno.h>
#include <fcntl.h>
#include <getopt.h>
+#include <linux/random.h>
#include <pthread.h>
-#include <unistd.h>
#include <stdbool.h>
+#include <string.h>
#include <stdio.h>
#include <stdlib.h>
-#include <string.h>
#include <signal.h>
-#include <linux/random.h>
#include <sys/syscall.h>
#include <sys/time.h>
+#include <unistd.h>
-#define ACC_TST_PRT printf
-#define PROCESS_NUM 32
-#define THREADS_NUM 64
-#define MAX_CTX_NUM 64
+#define ACC_TST_PRT printf
+#define PROCESS_NUM 32
+#define THREADS_NUM 64
+#define MAX_CTX_NUM 64
#define MAX_TIME_SECONDS 128
-#define BYTES_TO_MB 20
-#define MAX_OPT_TYPE 6
-#define MAX_DATA_SIZE (15 * 1024 * 1024)
-#define MAX_ALG_NAME 64
-#define ACC_QUEUE_SIZE 1024
+#define BYTES_TO_MB 20
+#define MAX_OPT_TYPE 6
+#define MAX_DATA_SIZE (15 * 1024 * 1024)
+#define MAX_ALG_NAME 64
+#define ACC_QUEUE_SIZE 1024
+#define MAX_DEVICE_NAME 64
#define MAX_BLOCK_NM 16384 /* BLOCK_NUM must 4 times of POOL_LENTH */
#define MAX_POOL_LENTH 4096
@@ -35,15 +36,15 @@
#define SEC_2_USEC 1000000
#define HASH_ZISE 16
+#define SCHED_SINGLE "sched_single"
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+#define gettid() syscall(__NR_gettid)
+
typedef unsigned long long u64;
typedef unsigned int u32;
typedef unsigned short u16;
typedef unsigned char u8;
-#define SCHED_SINGLE "sched_single"
-#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#define gettid() syscall(__NR_gettid)
-
/**
* struct acc_option - Define the test acc app option list.
* @algclass: 0:cipher 1:digest
@@ -55,9 +56,10 @@ typedef unsigned char u8;
* @latency: test packet running time
*/
struct acc_option {
- char algname[64];
+ char algname[MAX_ALG_NAME];
char algclass[64];
char engine[64];
+ char device[MAX_DEVICE_NAME];
u32 algtype;
u32 modetype;
u32 optype;
diff --git a/uadk_tool/benchmark/zip_uadk_benchmark.c b/uadk_tool/benchmark/zip_uadk_benchmark.c
index 9681c22..63fbdab 100644
--- a/uadk_tool/benchmark/zip_uadk_benchmark.c
+++ b/uadk_tool/benchmark/zip_uadk_benchmark.c
@@ -16,6 +16,7 @@
#define MAX_POOL_LENTH_COMP 1
#define COMPRESSION_RATIO_FACTOR 0.7
#define CHUNK_SIZE (128 * 1024)
+
struct uadk_bd {
u8 *src;
u8 *dst;
@@ -61,6 +62,7 @@ struct zip_file_head {
static struct wd_ctx_config g_ctx_cfg;
static struct wd_sched *g_sched;
+static struct sched_params param;
static unsigned int g_thread_num;
static unsigned int g_ctxnum;
static unsigned int g_pktlen;
@@ -240,7 +242,7 @@ static int zip_uadk_param_parse(thread_data *tddata, struct acc_option *options)
u8 alg;
if (optype >= WD_DIR_MAX << 1) {
- ZIP_TST_PRT("Fail to get zip optype!\n");
+ ZIP_TST_PRT("failed to get zip optype!\n");
return -EINVAL;
} else if (optype >= WD_DIR_MAX) {
mode = STREAM_MODE;
@@ -265,7 +267,7 @@ static int zip_uadk_param_parse(thread_data *tddata, struct acc_option *options)
optype = WD_DIR_COMPRESS;
break;
default:
- ZIP_TST_PRT("Fail to set zip alg\n");
+ ZIP_TST_PRT("failed to set zip alg\n");
return -EINVAL;
}
@@ -298,21 +300,22 @@ static int init_ctx_config2(struct acc_option *options)
/* init */
ret = wd_comp_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
if (ret) {
- ZIP_TST_PRT("Fail to do comp init2!\n");
+ ZIP_TST_PRT("failed to do comp init2!\n");
return ret;
}
return 0;
}
-static struct sched_params param;
static int init_ctx_config(struct acc_option *options)
{
- struct uacce_dev_list *list;
+ struct uacce_dev_list *list, *tmp;
char *alg = options->algclass;
int optype = options->optype;
int mode = options->syncmode;
- int i, max_node;
+ struct uacce_dev *dev = NULL;
+ int max_node, i;
+ char *dev_name;
int ret = 0;
optype = optype % WD_DIR_MAX;
@@ -322,61 +325,96 @@ static int init_ctx_config(struct acc_option *options)
list = wd_get_accel_list(alg);
if (!list) {
- ZIP_TST_PRT("Fail to get %s device\n", alg);
+ ZIP_TST_PRT("failed to get %s device\n", alg);
return -ENODEV;
}
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs)
- return -ENOMEM;
- g_sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 2, max_node, wd_comp_poll_ctx);
- if (!g_sched) {
- ZIP_TST_PRT("Fail to alloc sched!\n");
- goto out;
+ if (strlen(options->device) == 0) {
+ dev = list->dev;
+ } else {
+ for (tmp = list; tmp; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
+ }
+ }
+ }
+
+ if (dev == NULL) {
+ ZIP_TST_PRT("failed to find device %s\n", options->device);
+ ret = -ENODEV;
+ goto free_list;
}
/* If there is no numa, we defualt config to zero */
- if (list->dev->numa_id < 0)
- list->dev->numa_id = 0;
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs) {
+ ret = -ENOMEM;
+ goto free_list;
+ }
for (i = 0; i < g_ctxnum; i++) {
- g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(list->dev);
- g_ctx_cfg.ctxs[i].op_type = optype; // default op_type
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx) {
+ ZIP_TST_PRT("failed to alloc %dth ctx\n", i);
+ goto free_ctx;
+ }
+
+ g_ctx_cfg.ctxs[i].op_type = optype;
g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
+
+ g_sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 2, max_node, wd_comp_poll_ctx);
+ if (!g_sched) {
+ ZIP_TST_PRT("failed to alloc sched!\n");
+ ret = -ENOMEM;
+ goto free_ctx;
+ }
+
g_sched->name = SCHED_SINGLE;
/*
* All contexts for 2 modes & 2 types.
* The test only uses one kind of contexts at the same time.
*/
- param.numa_id = list->dev->numa_id;
+ param.numa_id = dev->numa_id;
param.type = optype;
param.mode = mode;
param.begin = 0;
param.end = g_ctxnum - 1;
ret = wd_sched_rr_instance(g_sched, &param);
if (ret) {
- ZIP_TST_PRT("Fail to fill sched data!\n");
- goto out;
+ ZIP_TST_PRT("failed to fill sched data!\n");
+ goto free_sched;
}
- /* init */
ret = wd_comp_init(&g_ctx_cfg, g_sched);
if (ret) {
- ZIP_TST_PRT("Fail to cipher ctx!\n");
- goto out;
+ ZIP_TST_PRT("failed to cipher ctx!\n");
+ goto free_sched;
}
wd_free_list_accels(list);
return 0;
-out:
- free(g_ctx_cfg.ctxs);
+
+free_sched:
wd_sched_rr_release(g_sched);
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+ free(g_ctx_cfg.ctxs);
+
+free_list:
+ wd_free_list_accels(list);
+
return ret;
}
--
2.25.1

308
0037-uadk_tool-support-sm3-ce-benchmark-and-function-test.patch Normal file
View File

@ -0,0 +1,308 @@
From abb578a52d3bd6a34ac852afb56f7da06e8de266 Mon Sep 17 00:00:00 2001
From: Zhiqi Song <songzhiqi1@huawei.com>
Date: Mon, 11 Mar 2024 16:29:30 +0800
Subject: [PATCH 37/44] uadk_tool: support sm3 ce benchmark and function test
Support performance and function test for sm3-ce.
Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com>
---
uadk_tool/Makefile.am | 1 +
uadk_tool/benchmark/sec_uadk_benchmark.c | 22 +++++++++++++--
uadk_tool/benchmark/uadk_benchmark.c | 29 ++++++++++++--------
uadk_tool/benchmark/uadk_benchmark.h | 1 +
uadk_tool/test/test_sec.c | 35 +++++++++++++++++++++---
5 files changed, 69 insertions(+), 19 deletions(-)
diff --git a/uadk_tool/Makefile.am b/uadk_tool/Makefile.am
index 7f00087..6fa0d9d 100644
--- a/uadk_tool/Makefile.am
+++ b/uadk_tool/Makefile.am
@@ -29,6 +29,7 @@ uadk_tool_LDADD=$(libwd_la_OBJECTS) \
../.libs/libhisi_sec.a \
../.libs/libhisi_hpre.a \
../.libs/libhisi_zip.a \
+ ../.libs/libisa_ce.a \
-ldl -lnuma
else
uadk_tool_LDADD=-L../.libs -l:libwd.so.2 -l:libwd_crypto.so.2 \
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index 105fb1a..c3da616 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -679,6 +679,7 @@ static void uninit_ctx_config2(int subtype)
wd_aead_uninit2();
break;
case DIGEST_TYPE:
+ case DIGEST_INSTR_TYPE:
wd_digest_uninit2();
break;
default:
@@ -703,12 +704,23 @@ static int init_ctx_config2(struct acc_option *options)
switch(subtype) {
case CIPHER_TYPE:
ret = wd_cipher_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ if (ret)
+ SEC_TST_PRT("failed to do cipher init2!\n");
break;
case AEAD_TYPE:
ret = wd_aead_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ if (ret)
+ SEC_TST_PRT("failed to do aead init2!\n");
break;
case DIGEST_TYPE:
ret = wd_digest_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ if (ret)
+ SEC_TST_PRT("failed to do digest init2!\n");
+ break;
+ case DIGEST_INSTR_TYPE:
+ ret = wd_digest_init2(alg_name, SCHED_POLICY_NONE, TASK_INSTR);
+ if (ret)
+ SEC_TST_PRT("failed to do digest intruction init2!\n");
break;
}
if (ret) {
@@ -716,7 +728,7 @@ static int init_ctx_config2(struct acc_option *options)
return ret;
}
- return 0;
+ return ret;
}
static void get_aead_data(u8 *addr, u32 size)
@@ -1489,8 +1501,8 @@ static void *sec_uadk_digest_sync(void *arg)
}
}
dreq.in_bytes = g_pktlen;
- dreq.out_bytes = 16;
- dreq.out_buf_bytes = 16;
+ dreq.out_bytes = 32;
+ dreq.out_buf_bytes = 32;
dreq.data_fmt = 0;
dreq.state = 0;
dreq.has_next = 0;
@@ -1536,8 +1548,12 @@ int sec_uadk_sync_threads(struct acc_option *options)
uadk_sec_sync_run = sec_uadk_aead_sync;
break;
case DIGEST_TYPE:
+ case DIGEST_INSTR_TYPE:
uadk_sec_sync_run = sec_uadk_digest_sync;
break;
+ default:
+ SEC_TST_PRT("Invalid subtype!\n");
+ return -EINVAL;
}
for (i = 0; i < g_thread_num; i++) {
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index 5dbe26a..9c025cf 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -37,6 +37,7 @@ enum test_type {
SOFT_MODE = 0x4,
SVA_SOFT = 0x5,
NOSVA_SOFT = 0x6,
+ INSTR_MODE = 0x7,
INVALID_MODE = 0x8,
};
@@ -51,6 +52,7 @@ static struct acc_sva_item sys_name_item[] = {
{"soft", SOFT_MODE},
{"sva-soft", SVA_SOFT},
{"nosva-soft", NOSVA_SOFT},
+ {"instr", INSTR_MODE},
};
struct acc_alg_item {
@@ -286,7 +288,7 @@ static int get_alg_type(const char *alg_name)
for (i = 0; i < ALG_MAX; i++) {
if (strcmp(alg_name, alg_options[i].name) == 0) {
- alg = alg_options[i].alg;
+ alg = alg_options[i].alg;
break;
}
}
@@ -482,8 +484,11 @@ static void parse_alg_param(struct acc_option *option)
option->subtype = AEAD_TYPE;
} else if (option->algtype <= SHA512_256) {
snprintf(option->algclass, MAX_ALG_NAME, "%s", "digest");
+ if (option->modetype == INSTR_MODE)
+ option->subtype = DIGEST_INSTR_TYPE;
+ else
+ option->subtype = DIGEST_TYPE;
option->acctype = SEC_TYPE;
- option->subtype = DIGEST_TYPE;
}
}
}
@@ -545,35 +550,35 @@ static int benchmark_run(struct acc_option *option)
switch(option->acctype) {
case SEC_TYPE:
- if (option->modetype & SVA_MODE) {
+ if ((option->modetype == SVA_MODE) || (option->modetype == INSTR_MODE)) {
ret = sec_uadk_benchmark(option);
- } else if (option->modetype & NOSVA_MODE) {
+ } else if (option->modetype == NOSVA_MODE) {
ret = sec_wd_benchmark(option);
}
usleep(20000);
#ifdef HAVE_CRYPTO
- if (option->modetype & SOFT_MODE) {
+ if (option->modetype == SOFT_MODE) {
ret = sec_soft_benchmark(option);
}
#endif
break;
case HPRE_TYPE:
- if (option->modetype & SVA_MODE) {
+ if (option->modetype == SVA_MODE) {
ret = hpre_uadk_benchmark(option);
- } else if (option->modetype & NOSVA_MODE) {
+ } else if (option->modetype == NOSVA_MODE) {
ret = hpre_wd_benchmark(option);
}
break;
case ZIP_TYPE:
- if (option->modetype & SVA_MODE) {
+ if (option->modetype == SVA_MODE) {
ret = zip_uadk_benchmark(option);
- } else if (option->modetype & NOSVA_MODE) {
+ } else if (option->modetype == NOSVA_MODE) {
ret = zip_wd_benchmark(option);
}
case TRNG_TYPE:
- if (option->modetype & SVA_MODE)
+ if (option->modetype == SVA_MODE)
ACC_TST_PRT("TRNG not support sva mode..\n");
- else if (option->modetype & NOSVA_MODE)
+ else if (option->modetype == NOSVA_MODE)
ret = trng_wd_benchmark(option);
break;
@@ -698,7 +703,7 @@ static void print_help(void)
ACC_TST_PRT("DESCRIPTION\n");
ACC_TST_PRT(" [--alg aes-128-cbc ]:\n");
ACC_TST_PRT(" The name of the algorithm for benchmarking\n");
- ACC_TST_PRT(" [--mode sva/nosva/soft/sva-soft/nosva-soft]: start UADK or Warpdrive or Openssl mode test\n");
+ ACC_TST_PRT(" [--mode sva/nosva/soft/sva-soft/nosva-soft/instr]: start UADK or Warpdrive or Openssl or Instruction mode test\n");
ACC_TST_PRT(" [--sync/--async]: start asynchronous/synchronous mode test\n");
ACC_TST_PRT(" [--opt 0,1,2,3,4,5]:\n");
ACC_TST_PRT(" SEC/ZIP: 0/1:encryption/decryption or compression/decompression\n");
diff --git a/uadk_tool/benchmark/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h
index fd3ebe5..e370d3e 100644
--- a/uadk_tool/benchmark/uadk_benchmark.h
+++ b/uadk_tool/benchmark/uadk_benchmark.h
@@ -104,6 +104,7 @@ enum alg_type {
SM2_TYPE,
X25519_TYPE,
X448_TYPE,
+ DIGEST_INSTR_TYPE,
};
enum sync_type {
diff --git a/uadk_tool/test/test_sec.c b/uadk_tool/test/test_sec.c
index 16feaf0..87fc718 100644
--- a/uadk_tool/test/test_sec.c
+++ b/uadk_tool/test/test_sec.c
@@ -32,7 +32,7 @@
#define SCHED_SINGLE "sched_single"
#define SCHED_NULL_CTX_SIZE 4
#define TEST_WORD_LEN 4096
-#define MAX_ALGO_PER_TYPE 16
+#define MAX_ALGO_PER_TYPE 17
#define MIN_SVA_BD_NUM 1
#define AES_KEYSIZE_128 16
#define AES_KEYSIZE_192 24
@@ -83,6 +83,8 @@ enum digest_type {
LOCAL_AES_GMAC_192,
LOCAL_AES_GMAC_256,
LOCAL_AES_XCBC_MAC_96,
+ LOCAL_AES_XCBC_PRF_128,
+ LOCAL_AES_CCM,
};
char *digest_names[MAX_ALGO_PER_TYPE] = {
@@ -102,6 +104,7 @@ char *digest_names[MAX_ALGO_PER_TYPE] = {
"xcbc-mac-96(aes)",
"xcbc-prf-128(aes)",
"ccm(aes)", /* --digest 15: for error alg test */
+ "sm3-ce",
};
char *aead_names[MAX_ALGO_PER_TYPE] = {
@@ -1464,11 +1467,14 @@ static int digest_init2(int type, int mode)
{
struct wd_ctx_params cparams = {0};
struct wd_ctx_nums *ctx_set_num;
+ char *alg_name;
int ret;
if (g_testalg >= MAX_ALGO_PER_TYPE)
return -WD_EINVAL;
+ alg_name = digest_names[g_testalg];
+
ctx_set_num = calloc(1, sizeof(*ctx_set_num));
if (!ctx_set_num) {
WD_ERR("failed to alloc ctx_set_size!\n");
@@ -1492,7 +1498,10 @@ static int digest_init2(int type, int mode)
if (mode == CTX_MODE_ASYNC)
ctx_set_num->async_ctx_num = g_ctxnum;
- ret = wd_digest_init2_(digest_names[g_testalg], 0, 0, &cparams);
+ if (!strcmp(alg_name, "sm3-ce"))
+ ret = wd_digest_init2("sm3", SCHED_POLICY_NONE, TASK_INSTR);
+ else
+ ret = wd_digest_init2_(digest_names[g_testalg], 0, 0, &cparams);
if (ret)
goto out_freebmp;
@@ -1780,7 +1789,22 @@ int get_digest_resource(struct hash_testvec **alg_tv, int* alg, int* mode)
tv->dsize = 16;
alg_type = WD_DIGEST_AES_XCBC_PRF_128;
break;
-
+ case 16: /* SM3-CE */
+ switch (g_alg_op_type) {
+ case 0:
+ mode_type = WD_DIGEST_NORMAL;
+ SEC_TST_PRT("test alg: %s\n", "normal(sm3-ce)");
+ tv = &sm3_tv_template[0];
+ break;
+ case 1:
+ mode_type = WD_DIGEST_HMAC;
+ SEC_TST_PRT("test alg: %s\n", "hmac(sm3-ce)");
+ tv = &hmac_sm3_tv_template[0];
+ break;
+ }
+ tv->dsize = 32;
+ alg_type = WD_DIGEST_SM3;
+ break;
default:
SEC_TST_PRT("keylenth error, default test alg: %s\n", "normal(sm3)");
return -EINVAL;
@@ -4229,7 +4253,7 @@ static void print_help(void)
SEC_TST_PRT(" 4 : SHA224; 5 : SHA384; 6 : SHA512; 7 : SHA512_224\n");
SEC_TST_PRT(" 8 : SHA512_256; 9 : AES_CMAC; 10 : AES_GMAC_128\n");
SEC_TST_PRT(" 11 : AES_GMAC_192; 12 : AES_GMAC_256; 13 : AES_XCBC_MAC_96\n");
- SEC_TST_PRT(" 14 : AES_XCBC_PRF_128\n");
+ SEC_TST_PRT(" 14 : AES_XCBC_PRF_128; 15 : SM3-CE\n");
SEC_TST_PRT(" [--aead ]:\n");
SEC_TST_PRT(" specify symmetric aead algorithm\n");
SEC_TST_PRT(" 0 : AES-CCM; 1 : AES-GCM; 2 : Hmac(sha256),cbc(aes)\n");
@@ -4257,6 +4281,9 @@ static void print_help(void)
SEC_TST_PRT(" set the steam mode for digest\n");
SEC_TST_PRT(" [--sglnum]:\n");
SEC_TST_PRT(" the number of scatterlist number used by the entire test task\n");
+ SEC_TST_PRT(" [--init]:\n");
+ SEC_TST_PRT(" 1: use init API of uadk\n");
+ SEC_TST_PRT(" 2: use init2 API of uadk\n");
SEC_TST_PRT(" [--help] = usage\n");
SEC_TST_PRT("Example\n");
SEC_TST_PRT(" ./uadk_tool test --m sec --cipher 0 --sync --optype 0\n");
--
2.25.1

167
0038-uadk_tool-support-sm4-ce-benchmark-test.patch Normal file
View File

@ -0,0 +1,167 @@
From 3ca60986407cfe3b1ddd264b0bfbe24d88856d71 Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Mon, 11 Mar 2024 16:31:35 +0800
Subject: [PATCH 38/44] uadk_tool: support sm4 ce benchmark test
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Support performance test for sm4-ce. Add CBC-CS1、CBC-CS2
and CBC-CS3 mode for SM4 algorithm in benchmark tool.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
uadk_tool/benchmark/sec_uadk_benchmark.c | 25 ++++++++++++++++++++++++
uadk_tool/benchmark/sec_wd_benchmark.c | 18 +++++++++++++++++
uadk_tool/benchmark/uadk_benchmark.c | 11 ++++++++++-
uadk_tool/benchmark/uadk_benchmark.h | 4 ++++
4 files changed, 57 insertions(+), 1 deletion(-)
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index c3da616..f8b19ba 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -346,6 +346,24 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
mode = WD_CIPHER_CBC;
alg = WD_CIPHER_SM4;
break;
+ case SM4_128_CBC_CS1:
+ keysize = 16;
+ ivsize = 16;
+ mode = WD_CIPHER_CBC_CS1;
+ alg = WD_CIPHER_SM4;
+ break;
+ case SM4_128_CBC_CS2:
+ keysize = 16;
+ ivsize = 16;
+ mode = WD_CIPHER_CBC_CS2;
+ alg = WD_CIPHER_SM4;
+ break;
+ case SM4_128_CBC_CS3:
+ keysize = 16;
+ ivsize = 16;
+ mode = WD_CIPHER_CBC_CS3;
+ alg = WD_CIPHER_SM4;
+ break;
case SM4_128_CTR:
keysize = 16;
ivsize = 16;
@@ -673,6 +691,7 @@ static void uninit_ctx_config2(int subtype)
/* uninit2 */
switch(subtype) {
case CIPHER_TYPE:
+ case CIPHER_INSTR_TYPE:
wd_cipher_uninit2();
break;
case AEAD_TYPE:
@@ -707,6 +726,11 @@ static int init_ctx_config2(struct acc_option *options)
if (ret)
SEC_TST_PRT("failed to do cipher init2!\n");
break;
+ case CIPHER_INSTR_TYPE:
+ ret = wd_cipher_init2(alg_name, SCHED_POLICY_NONE, TASK_INSTR);
+ if (ret)
+ SEC_TST_PRT("failed to do cipher intruction init2!\n");
+ break;
case AEAD_TYPE:
ret = wd_aead_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
if (ret)
@@ -1542,6 +1566,7 @@ int sec_uadk_sync_threads(struct acc_option *options)
switch (options->subtype) {
case CIPHER_TYPE:
+ case CIPHER_INSTR_TYPE:
uadk_sec_sync_run = sec_uadk_cipher_sync;
break;
case AEAD_TYPE:
diff --git a/uadk_tool/benchmark/sec_wd_benchmark.c b/uadk_tool/benchmark/sec_wd_benchmark.c
index 2ed8493..bb47d61 100644
--- a/uadk_tool/benchmark/sec_wd_benchmark.c
+++ b/uadk_tool/benchmark/sec_wd_benchmark.c
@@ -412,6 +412,24 @@ static int sec_wd_param_parse(thread_data *tddata, struct acc_option *options)
mode = WCRYPTO_CIPHER_CBC;
alg = WCRYPTO_CIPHER_SM4;
break;
+ case SM4_128_CBC_CS1:
+ keysize = 16;
+ ivsize = 16;
+ mode = WCRYPTO_CIPHER_CBC_CS1;
+ alg = WCRYPTO_CIPHER_SM4;
+ break;
+ case SM4_128_CBC_CS2:
+ keysize = 16;
+ ivsize = 16;
+ mode = WCRYPTO_CIPHER_CBC_CS2;
+ alg = WCRYPTO_CIPHER_SM4;
+ break;
+ case SM4_128_CBC_CS3:
+ keysize = 16;
+ ivsize = 16;
+ mode = WCRYPTO_CIPHER_CBC_CS3;
+ alg = WCRYPTO_CIPHER_SM4;
+ break;
case SM4_128_CTR:
keysize = 16;
ivsize = 16;
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index 9c025cf..f9bb69c 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -120,6 +120,9 @@ static struct acc_alg_item alg_options[] = {
{"3des-192-cbc", DES3_192_CBC},
{"sm4-128-ecb", SM4_128_ECB},
{"sm4-128-cbc", SM4_128_CBC},
+ {"sm4-128-cbc-cs1", SM4_128_CBC_CS1},
+ {"sm4-128-cbc-cs2", SM4_128_CBC_CS2},
+ {"sm4-128-cbc-cs3", SM4_128_CBC_CS3},
{"sm4-128-ctr", SM4_128_CTR},
{"sm4-128-ofb", SM4_128_OFB},
{"sm4-128-cfb", SM4_128_CFB},
@@ -209,6 +212,9 @@ static struct acc_alg_item alg_name_options[] = {
{"cbc(des3_ede)", DES3_192_CBC},
{"ecb(sm4)", SM4_128_ECB},
{"cbc(sm4)", SM4_128_CBC},
+ {"cbc-cs1(sm4)", SM4_128_CBC_CS1},
+ {"cbc-cs2(sm4)", SM4_128_CBC_CS2},
+ {"cbc-cs3(sm4)", SM4_128_CBC_CS3},
{"ctr(sm4)", SM4_128_CTR},
{"ofb(sm4)", SM4_128_OFB},
{"cfb(sm4)", SM4_128_CFB},
@@ -476,8 +482,11 @@ static void parse_alg_param(struct acc_option *option)
option->subtype = ECDSA_TYPE;
} else if (option->algtype <= SM4_128_XTS_GB) {
snprintf(option->algclass, MAX_ALG_NAME, "%s", "cipher");
+ if (option->modetype == INSTR_MODE)
+ option->subtype = CIPHER_INSTR_TYPE;
+ else
+ option->subtype = CIPHER_TYPE;
option->acctype = SEC_TYPE;
- option->subtype = CIPHER_TYPE;
} else if (option->algtype <= SM4_128_GCM) {
snprintf(option->algclass, MAX_ALG_NAME, "%s", "aead");
option->acctype = SEC_TYPE;
diff --git a/uadk_tool/benchmark/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h
index e370d3e..ea8e437 100644
--- a/uadk_tool/benchmark/uadk_benchmark.h
+++ b/uadk_tool/benchmark/uadk_benchmark.h
@@ -105,6 +105,7 @@ enum alg_type {
X25519_TYPE,
X448_TYPE,
DIGEST_INSTR_TYPE,
+ CIPHER_INSTR_TYPE,
};
enum sync_type {
@@ -172,6 +173,9 @@ enum test_alg {
DES3_192_CBC,
SM4_128_ECB,
SM4_128_CBC,
+ SM4_128_CBC_CS1,
+ SM4_128_CBC_CS2,
+ SM4_128_CBC_CS3,
SM4_128_CTR,
SM4_128_OFB,
SM4_128_CFB,
--
2.25.1

272
0039-uadk_tool-support-sm3-md5-multibuff-benchmark-test.patch Normal file
View File

@ -0,0 +1,272 @@
From 7b3f79fedc187ded4dc7d6bdc976d0e560cc746d Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Mon, 11 Mar 2024 16:33:58 +0800
Subject: [PATCH 39/44] uadk_tool: support sm3/md5 multibuff benchmark test
Support sm3/md5 multibuff benchmark test
Signed-off-by: Weili Qian <qianweili@huawei.com>
---
uadk_tool/benchmark/sec_uadk_benchmark.c | 31 +++++++++++++++---------
uadk_tool/benchmark/uadk_benchmark.c | 26 ++++++++++++++------
uadk_tool/benchmark/uadk_benchmark.h | 3 ++-
3 files changed, 40 insertions(+), 20 deletions(-)
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index f8b19ba..2c12c20 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -53,6 +53,7 @@ typedef struct uadk_thread_res {
bool is_union;
u32 dalg;
u32 dmode;
+ u32 d_outbytes;
} thread_data;
static struct wd_ctx_config g_ctx_cfg;
@@ -146,6 +147,7 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
u32 algtype = options->algtype;
u32 optype = options->optype;
bool is_union = false;
+ u32 out_bytes = 32;
u8 keysize = 0;
u8 ivsize = 0;
u8 dmode = 0;
@@ -472,45 +474,54 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
case SM3_ALG: // digest mode is optype
keysize = 4;
mode = optype;
+ out_bytes = 32;
alg = WD_DIGEST_SM3;
break;
case MD5_ALG:
keysize = 4;
+ out_bytes = 16;
mode = optype;
alg = WD_DIGEST_MD5;
break;
case SHA1_ALG:
keysize = 4;
+ out_bytes = 20;
mode = optype;
alg = WD_DIGEST_SHA1;
break;
case SHA256_ALG:
keysize = 4;
+ out_bytes = 32;
mode = optype;
alg = WD_DIGEST_SHA256;
break;
case SHA224_ALG:
keysize = 4;
+ out_bytes = 28;
mode = optype;
alg = WD_DIGEST_SHA224;
break;
case SHA384_ALG:
keysize = 4;
+ out_bytes = 48;
mode = optype;
alg = WD_DIGEST_SHA384;
break;
case SHA512_ALG:
keysize = 4;
+ out_bytes = 64;
mode = optype;
alg = WD_DIGEST_SHA512;
break;
case SHA512_224:
keysize = 4;
+ out_bytes = 28;
mode = optype;
alg = WD_DIGEST_SHA512_224;
break;
case SHA512_256:
keysize = 4;
+ out_bytes = 32;
mode = optype;
alg = WD_DIGEST_SHA512_256;
break;
@@ -528,6 +539,7 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
tddata->is_union = is_union;
tddata->optype = options->optype;
tddata->subtype = options->subtype;
+ tddata->d_outbytes = out_bytes;
return 0;
}
@@ -698,7 +710,6 @@ static void uninit_ctx_config2(int subtype)
wd_aead_uninit2();
break;
case DIGEST_TYPE:
- case DIGEST_INSTR_TYPE:
wd_digest_uninit2();
break;
default:
@@ -737,15 +748,10 @@ static int init_ctx_config2(struct acc_option *options)
SEC_TST_PRT("failed to do aead init2!\n");
break;
case DIGEST_TYPE:
- ret = wd_digest_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ ret = wd_digest_init2(alg_name, options->sched_type, options->task_type);
if (ret)
SEC_TST_PRT("failed to do digest init2!\n");
break;
- case DIGEST_INSTR_TYPE:
- ret = wd_digest_init2(alg_name, SCHED_POLICY_NONE, TASK_INSTR);
- if (ret)
- SEC_TST_PRT("failed to do digest intruction init2!\n");
- break;
}
if (ret) {
SEC_TST_PRT("failed to do cipher init2!\n");
@@ -1305,8 +1311,8 @@ static void *sec_uadk_digest_async(void *arg)
}
}
dreq.in_bytes = g_pktlen;
- dreq.out_bytes = 16;
- dreq.out_buf_bytes = 16;
+ dreq.out_bytes = pdata->d_outbytes;
+ dreq.out_buf_bytes = pdata->d_outbytes;
dreq.data_fmt = 0;
dreq.state = 0;
dreq.has_next = 0;
@@ -1525,8 +1531,8 @@ static void *sec_uadk_digest_sync(void *arg)
}
}
dreq.in_bytes = g_pktlen;
- dreq.out_bytes = 32;
- dreq.out_buf_bytes = 32;
+ dreq.out_bytes = pdata->d_outbytes;
+ dreq.out_buf_bytes = pdata->d_outbytes;
dreq.data_fmt = 0;
dreq.state = 0;
dreq.has_next = 0;
@@ -1573,7 +1579,6 @@ int sec_uadk_sync_threads(struct acc_option *options)
uadk_sec_sync_run = sec_uadk_aead_sync;
break;
case DIGEST_TYPE:
- case DIGEST_INSTR_TYPE:
uadk_sec_sync_run = sec_uadk_digest_sync;
break;
default:
@@ -1591,6 +1596,7 @@ int sec_uadk_sync_threads(struct acc_option *options)
threads_args[i].ivsize = threads_option.ivsize;
threads_args[i].optype = threads_option.optype;
threads_args[i].td_id = i;
+ threads_args[i].d_outbytes = threads_option.d_outbytes;
ret = pthread_create(&tdid[i], NULL, uadk_sec_sync_run, &threads_args[i]);
if (ret) {
SEC_TST_PRT("Create sync thread fail!\n");
@@ -1662,6 +1668,7 @@ int sec_uadk_async_threads(struct acc_option *options)
threads_args[i].ivsize = threads_option.ivsize;
threads_args[i].optype = threads_option.optype;
threads_args[i].td_id = i;
+ threads_args[i].d_outbytes = threads_option.d_outbytes;
ret = pthread_create(&tdid[i], NULL, uadk_sec_async_run, &threads_args[i]);
if (ret) {
SEC_TST_PRT("Create async thread fail!\n");
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index f9bb69c..c1accc6 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -2,6 +2,8 @@
#include <sys/types.h>
#include <sys/wait.h>
+#include "include/wd_alg_common.h"
+#include "include/wd_sched.h"
#include "uadk_benchmark.h"
#include "sec_uadk_benchmark.h"
@@ -38,7 +40,8 @@ enum test_type {
SVA_SOFT = 0x5,
NOSVA_SOFT = 0x6,
INSTR_MODE = 0x7,
- INVALID_MODE = 0x8,
+ MULTIBUF_MODE = 0x8,
+ INVALID_MODE = 0x9,
};
struct acc_sva_item {
@@ -53,6 +56,7 @@ static struct acc_sva_item sys_name_item[] = {
{"sva-soft", SVA_SOFT},
{"nosva-soft", NOSVA_SOFT},
{"instr", INSTR_MODE},
+ {"multibuff", MULTIBUF_MODE},
};
struct acc_alg_item {
@@ -493,11 +497,15 @@ static void parse_alg_param(struct acc_option *option)
option->subtype = AEAD_TYPE;
} else if (option->algtype <= SHA512_256) {
snprintf(option->algclass, MAX_ALG_NAME, "%s", "digest");
- if (option->modetype == INSTR_MODE)
- option->subtype = DIGEST_INSTR_TYPE;
- else
- option->subtype = DIGEST_TYPE;
+ option->subtype = DIGEST_TYPE;
option->acctype = SEC_TYPE;
+ if (option->modetype == INSTR_MODE) {
+ option->sched_type = SCHED_POLICY_NONE;
+ option->task_type = TASK_INSTR;
+ } else if (option->modetype == MULTIBUF_MODE) {
+ option->sched_type = SCHED_POLICY_SINGLE;
+ option->task_type = TASK_INSTR;
+ }
}
}
}
@@ -559,7 +567,9 @@ static int benchmark_run(struct acc_option *option)
switch(option->acctype) {
case SEC_TYPE:
- if ((option->modetype == SVA_MODE) || (option->modetype == INSTR_MODE)) {
+ if ((option->modetype == SVA_MODE) ||
+ (option->modetype == INSTR_MODE) ||
+ (option->modetype == MULTIBUF_MODE)) {
ret = sec_uadk_benchmark(option);
} else if (option->modetype == NOSVA_MODE) {
ret = sec_wd_benchmark(option);
@@ -623,6 +633,8 @@ int acc_benchmark_run(struct acc_option *option)
int i, ret = 0;
int status;
+ option->sched_type = SCHED_POLICY_RR;
+ option->task_type = TASK_HW;
parse_alg_param(option);
dump_param(option);
g_run_options = option;
@@ -712,7 +724,7 @@ static void print_help(void)
ACC_TST_PRT("DESCRIPTION\n");
ACC_TST_PRT(" [--alg aes-128-cbc ]:\n");
ACC_TST_PRT(" The name of the algorithm for benchmarking\n");
- ACC_TST_PRT(" [--mode sva/nosva/soft/sva-soft/nosva-soft/instr]: start UADK or Warpdrive or Openssl or Instruction mode test\n");
+ ACC_TST_PRT(" [--mode sva/nosva/soft/sva-soft/nosva-soft/instr/multibuff]: start UADK or Warpdrive or Openssl or Instruction mode test\n");
ACC_TST_PRT(" [--sync/--async]: start asynchronous/synchronous mode test\n");
ACC_TST_PRT(" [--opt 0,1,2,3,4,5]:\n");
ACC_TST_PRT(" SEC/ZIP: 0/1:encryption/decryption or compression/decompression\n");
diff --git a/uadk_tool/benchmark/uadk_benchmark.h b/uadk_tool/benchmark/uadk_benchmark.h
index ea8e437..c493ac3 100644
--- a/uadk_tool/benchmark/uadk_benchmark.h
+++ b/uadk_tool/benchmark/uadk_benchmark.h
@@ -77,6 +77,8 @@ struct acc_option {
u32 complevel;
u32 inittype;
bool latency;
+ u32 sched_type;
+ int task_type;
};
enum acc_type {
@@ -104,7 +106,6 @@ enum alg_type {
SM2_TYPE,
X25519_TYPE,
X448_TYPE,
- DIGEST_INSTR_TYPE,
CIPHER_INSTR_TYPE,
};
--
2.25.1

467
0040-uadk-tool-fix-the-msg-pool-release-bug-of-async-zip-.patch Normal file
View File

@ -0,0 +1,467 @@
From 34c49db7d9eba5255f678179da95a15976dbb305 Mon Sep 17 00:00:00 2001
From: Chenghai Huang <huangchenghai2@huawei.com>
Date: Mon, 11 Mar 2024 16:36:13 +0800
Subject: [PATCH 40/44] uadk tool: fix the msg pool release bug of async zip
benchmark
Ensure that all packets in the msg pool are removed before end.
In V2, resources such as tags are released in a centralized manner
to avoid errors caused by asynchronous resource release sequence.
In V1, before the packet sending thread releases the tag, ensure
that the poll thread has ended.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
---
uadk_tool/benchmark/uadk_benchmark.c | 4 +-
uadk_tool/benchmark/zip_uadk_benchmark.c | 151 ++++++++++++-----------
uadk_tool/benchmark/zip_wd_benchmark.c | 25 ++--
3 files changed, 99 insertions(+), 81 deletions(-)
diff --git a/uadk_tool/benchmark/uadk_benchmark.c b/uadk_tool/benchmark/uadk_benchmark.c
index c1accc6..1262a2a 100644
--- a/uadk_tool/benchmark/uadk_benchmark.c
+++ b/uadk_tool/benchmark/uadk_benchmark.c
@@ -594,6 +594,7 @@ static int benchmark_run(struct acc_option *option)
} else if (option->modetype == NOSVA_MODE) {
ret = zip_wd_benchmark(option);
}
+ break;
case TRNG_TYPE:
if (option->modetype == SVA_MODE)
ACC_TST_PRT("TRNG not support sva mode..\n");
@@ -727,7 +728,8 @@ static void print_help(void)
ACC_TST_PRT(" [--mode sva/nosva/soft/sva-soft/nosva-soft/instr/multibuff]: start UADK or Warpdrive or Openssl or Instruction mode test\n");
ACC_TST_PRT(" [--sync/--async]: start asynchronous/synchronous mode test\n");
ACC_TST_PRT(" [--opt 0,1,2,3,4,5]:\n");
- ACC_TST_PRT(" SEC/ZIP: 0/1:encryption/decryption or compression/decompression\n");
+ ACC_TST_PRT(" SEC: cipher,aead: 0/1:encryption/decryption; digest: 0/1:normal/hmac\n");
+ ACC_TST_PRT(" ZIP: 0~1:block compression, block decompression; 2~3:stream compression, stream decompression\n");
ACC_TST_PRT(" HPRE: 0~5:keygen, key compute, Enc, Dec, Sign, Verify\n");
ACC_TST_PRT(" [--pktlen]:\n");
ACC_TST_PRT(" set the length of BD message in bytes\n");
diff --git a/uadk_tool/benchmark/zip_uadk_benchmark.c b/uadk_tool/benchmark/zip_uadk_benchmark.c
index 63fbdab..1dd3990 100644
--- a/uadk_tool/benchmark/zip_uadk_benchmark.c
+++ b/uadk_tool/benchmark/zip_uadk_benchmark.c
@@ -16,7 +16,7 @@
#define MAX_POOL_LENTH_COMP 1
#define COMPRESSION_RATIO_FACTOR 0.7
#define CHUNK_SIZE (128 * 1024)
-
+#define MAX_UNRECV_PACKET_NUM 2
struct uadk_bd {
u8 *src;
u8 *dst;
@@ -37,11 +37,17 @@ enum ZIP_OP_MODE {
STREAM_MODE
};
+enum ZIP_THREAD_STATE {
+ THREAD_PROCESSING,
+ THREAD_COMPLETED
+};
+
struct zip_async_tag {
handle_t sess;
u32 td_id;
u32 bd_idx;
u32 cm_len;
+ u32 recv_cnt;
ZSTD_CCtx *cctx;
};
@@ -52,6 +58,10 @@ typedef struct uadk_thread_res {
u32 td_id;
u32 win_sz;
u32 comp_lv;
+ u32 send_cnt;
+ struct zip_async_tag *tag;
+ COMP_TUPLE_TAG *ftuple;
+ char *hw_buff_out;
} thread_data;
struct zip_file_head {
@@ -67,6 +77,7 @@ static unsigned int g_thread_num;
static unsigned int g_ctxnum;
static unsigned int g_pktlen;
static unsigned int g_prefetch;
+static unsigned int g_state;
#ifndef ZLIB_FSE
static ZSTD_CCtx* zstd_soft_fse_init(unsigned int level)
@@ -541,6 +552,7 @@ static void *zip_lz77_async_cb(struct wd_comp_req *req, void *data)
zstd_output.dst = uadk_pool->bds[idx].dst;
zstd_output.size = tag->cm_len;
zstd_output.pos = 0;
+ __atomic_add_fetch(&tag->recv_cnt, 1, __ATOMIC_RELAXED);
fse_size = zstd_soft_fse(req->priv, &zstd_input, &zstd_output, cctx, ZSTD_e_end);
uadk_pool->bds[idx].dst_len = fse_size;
@@ -554,6 +566,7 @@ static void *zip_async_cb(struct wd_comp_req *req, void *data)
struct bd_pool *uadk_pool;
int td_id = tag->td_id;
int idx = tag->bd_idx;
+ __atomic_add_fetch(&tag->recv_cnt, 1, __ATOMIC_RELAXED);
uadk_pool = &g_zip_pool.pool[td_id];
uadk_pool->bds[idx].dst_len = req->dst_len;
@@ -566,15 +579,14 @@ static void *zip_uadk_poll(void *data)
thread_data *pdata = (thread_data *)data;
u32 expt = ACC_QUEUE_SIZE * g_thread_num;
u32 id = pdata->td_id;
- u32 last_time = 2; // poll need one more recv time
u32 count = 0;
u32 recv = 0;
- int ret;
+ int ret;
if (id > g_ctxnum)
return NULL;
- while (last_time) {
+ while (g_state == THREAD_PROCESSING) {
ret = wd_comp_poll_ctx(id, expt, &recv);
count += recv;
recv = 0;
@@ -582,9 +594,6 @@ static void *zip_uadk_poll(void *data)
ZIP_TST_PRT("poll ret: %d!\n", ret);
goto recv_error;
}
-
- if (get_run_state() == 0)
- last_time--;
}
recv_error:
@@ -596,12 +605,11 @@ recv_error:
static void *zip_uadk_poll2(void *data)
{
u32 expt = ACC_QUEUE_SIZE * g_thread_num;
- u32 last_time = 2; // poll need one more recv time
u32 count = 0;
u32 recv = 0;
int ret;
- while (last_time) {
+ while (g_state == THREAD_PROCESSING) {
ret = wd_comp_poll(expt, &recv);
count += recv;
recv = 0;
@@ -609,9 +617,6 @@ static void *zip_uadk_poll2(void *data)
ZIP_TST_PRT("poll ret: %d!\n", ret);
goto recv_error;
}
-
- if (get_run_state() == 0)
- last_time--;
}
recv_error:
@@ -803,11 +808,8 @@ static void *zip_uadk_blk_lz77_async_run(void *arg)
thread_data *pdata = (thread_data *)arg;
struct wd_comp_sess_setup comp_setup = {0};
ZSTD_CCtx *cctx = zstd_soft_fse_init(15);
- COMP_TUPLE_TAG *ftuple = NULL;
struct bd_pool *uadk_pool;
struct wd_comp_req creq;
- struct zip_async_tag *tag;
- char *hw_buff_out = NULL;
handle_t h_sess;
u32 out_len = 0;
u32 count = 0;
@@ -838,37 +840,22 @@ static void *zip_uadk_blk_lz77_async_run(void *arg)
creq.data_fmt = 0;
creq.status = 0;
- ftuple = malloc(sizeof(COMP_TUPLE_TAG) * MAX_POOL_LENTH_COMP);
- if (!ftuple)
- goto fse_err;
-
- hw_buff_out = malloc(out_len * MAX_POOL_LENTH_COMP);
- if (!hw_buff_out)
- goto hw_buff_err;
- memset(hw_buff_out, 0x0, out_len * MAX_POOL_LENTH_COMP);
-
- tag = malloc(sizeof(*tag) * MAX_POOL_LENTH_COMP);
- if (!tag) {
- ZIP_TST_PRT("failed to malloc zip tag!\n");
- goto tag_err;
- }
-
while(1) {
if (get_run_state() == 0)
break;
i = count % MAX_POOL_LENTH_COMP;
creq.src = uadk_pool->bds[i].src;
- creq.dst = &hw_buff_out[i]; //temp out
+ creq.dst = &pdata->hw_buff_out[i]; //temp out
creq.src_len = uadk_pool->bds[i].src_len;
creq.dst_len = out_len;
- creq.priv = &ftuple[i];
+ creq.priv = &pdata->ftuple[i];
- tag[i].td_id = pdata->td_id;
- tag[i].bd_idx = i;
- tag[i].cm_len = out_len;
- tag[i].cctx = cctx;
- creq.cb_param = &tag[i];
+ pdata->tag[i].td_id = pdata->td_id;
+ pdata->tag[i].bd_idx = i;
+ pdata->tag[i].cm_len = out_len;
+ pdata->tag[i].cctx = cctx;
+ creq.cb_param = &pdata->tag[i];
ret = wd_do_comp_async(h_sess, &creq);
if (ret == -WD_EBUSY) {
@@ -884,20 +871,8 @@ static void *zip_uadk_blk_lz77_async_run(void *arg)
}
try_cnt = 0;
count++;
+ __atomic_add_fetch(&pdata->send_cnt, 1, __ATOMIC_RELAXED);
}
-
- while (1) {
- if (get_recv_time() > 0) // wait Async mode finish recv
- break;
- usleep(SEND_USLEEP);
- }
-
-tag_err:
- free(tag);
-hw_buff_err:
- free(hw_buff_out);
-fse_err:
- free(ftuple);
wd_comp_free_sess(h_sess);
add_send_complete();
@@ -1033,7 +1008,6 @@ static void *zip_uadk_blk_async_run(void *arg)
thread_data *pdata = (thread_data *)arg;
struct wd_comp_sess_setup comp_setup = {0};
struct bd_pool *uadk_pool;
- struct zip_async_tag *tag;
struct wd_comp_req creq;
handle_t h_sess;
int try_cnt = 0;
@@ -1066,13 +1040,6 @@ static void *zip_uadk_blk_async_run(void *arg)
creq.priv = 0;
creq.status = 0;
- tag = malloc(sizeof(*tag) * MAX_POOL_LENTH_COMP);
- if (!tag) {
- ZIP_TST_PRT("failed to malloc zip tag!\n");
- wd_comp_free_sess(h_sess);
- return NULL;
- }
-
while(1) {
if (get_run_state() == 0)
break;
@@ -1083,9 +1050,9 @@ static void *zip_uadk_blk_async_run(void *arg)
creq.src_len = uadk_pool->bds[i].src_len;
creq.dst_len = out_len;
- tag[i].td_id = pdata->td_id;
- tag[i].bd_idx = i;
- creq.cb_param = &tag[i];
+ pdata->tag[i].td_id = pdata->td_id;
+ pdata->tag[i].bd_idx = i;
+ creq.cb_param = &pdata->tag[i];
ret = wd_do_comp_async(h_sess, &creq);
if (ret == -WD_EBUSY) {
@@ -1101,15 +1068,9 @@ static void *zip_uadk_blk_async_run(void *arg)
}
try_cnt = 0;
count++;
+ __atomic_add_fetch(&pdata->send_cnt, 1, __ATOMIC_RELAXED);
}
- while (1) {
- if (get_recv_time() > 0) // wait Async mode finish recv
- break;
- usleep(SEND_USLEEP);
- }
-
- free(tag);
wd_comp_free_sess(h_sess);
add_send_complete();
@@ -1215,10 +1176,35 @@ static int zip_uadk_async_threads(struct acc_option *options)
threads_args[i].win_sz = threads_option.win_sz;
threads_args[i].comp_lv = threads_option.comp_lv;
threads_args[i].td_id = i;
+ if (threads_option.alg == LZ77_ZSTD) {
+ struct bd_pool *uadk_pool = &g_zip_pool.pool[i];
+ u32 out_len = uadk_pool->bds[0].dst_len;
+
+ threads_args[i].ftuple = malloc(sizeof(COMP_TUPLE_TAG) *
+ MAX_POOL_LENTH_COMP);
+ if (!threads_args[i].ftuple) {
+ ZIP_TST_PRT("failed to malloc lz77 ftuple!\n");
+ goto lz77_free;
+ }
+
+ threads_args[i].hw_buff_out = malloc(out_len * MAX_POOL_LENTH_COMP);
+ if (!threads_args[i].hw_buff_out) {
+ ZIP_TST_PRT("failed to malloc lz77 hw_buff_out!\n");
+ goto lz77_free;
+ }
+ memset(threads_args[i].hw_buff_out, 0x0, out_len * MAX_POOL_LENTH_COMP);
+ }
+ threads_args[i].tag = malloc(sizeof(struct zip_async_tag) * MAX_POOL_LENTH_COMP);
+ if (!threads_args[i].tag) {
+ ZIP_TST_PRT("failed to malloc zip tag!\n");
+ goto tag_free;
+ }
+ threads_args[i].tag->recv_cnt = 0;
+ threads_args[i].send_cnt = 0;
ret = pthread_create(&tdid[i], NULL, uadk_zip_async_run, &threads_args[i]);
if (ret) {
ZIP_TST_PRT("Create async thread fail!\n");
- goto async_error;
+ goto tag_free;
}
}
@@ -1227,18 +1213,41 @@ static int zip_uadk_async_threads(struct acc_option *options)
ret = pthread_join(tdid[i], NULL);
if (ret) {
ZIP_TST_PRT("Join async thread fail!\n");
- goto async_error;
+ goto tag_free;
}
}
+ /* wait for the poll to clear packets */
+ g_state = THREAD_PROCESSING;
+ for (i = 0; i < g_thread_num;) {
+ if (threads_args[i].send_cnt <= threads_args[i].tag->recv_cnt + MAX_UNRECV_PACKET_NUM)
+ i++;
+ }
+ g_state = THREAD_COMPLETED; // finish poll
+
for (i = 0; i < g_ctxnum; i++) {
ret = pthread_join(pollid[i], NULL);
if (ret) {
ZIP_TST_PRT("Join poll thread fail!\n");
- goto async_error;
+ goto tag_free;
}
}
+tag_free:
+ for (i = 0; i < g_thread_num; i++) {
+ if (threads_args[i].tag)
+ free(threads_args[i].tag);
+ }
+lz77_free:
+ if (threads_option.alg == LZ77_ZSTD) {
+ for (i = 0; i < g_thread_num; i++) {
+ if (threads_args[i].ftuple)
+ free(threads_args[i].ftuple);
+
+ if (threads_args[i].hw_buff_out)
+ free(threads_args[i].hw_buff_out);
+ }
+ }
async_error:
return ret;
}
diff --git a/uadk_tool/benchmark/zip_wd_benchmark.c b/uadk_tool/benchmark/zip_wd_benchmark.c
index 4424e08..cbe07fc 100644
--- a/uadk_tool/benchmark/zip_wd_benchmark.c
+++ b/uadk_tool/benchmark/zip_wd_benchmark.c
@@ -21,6 +21,7 @@
#define COMPRESSION_RATIO_FACTOR 0.7
#define MAX_POOL_LENTH_COMP 512
#define CHUNK_SIZE (128 * 1024)
+#define MAX_UNRECV_PACKET_NUM 2
#define __ALIGN_MASK(x, mask) (((x) + (mask)) & ~(mask))
#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a)-1)
@@ -49,6 +50,11 @@ enum ZIP_OP_MODE {
STREAM_MODE
};
+enum ZIP_THREAD_STATE {
+ THREAD_PROCESSING,
+ THREAD_COMPLETED
+};
+
struct zip_async_tag {
void *ctx;
u32 td_id;
@@ -75,6 +81,8 @@ struct zip_file_head {
static unsigned int g_thread_num;
static unsigned int g_pktlen;
+static unsigned int g_send_cnt[THREADS_NUM];
+static unsigned int g_recv_state[THREADS_NUM];
static int save_file_data(const char *alg, u32 pkg_len, u32 optype)
{
@@ -470,9 +478,10 @@ static void *zip_wd_poll(void *data)
count += recv;
recv = 0;
- if (get_run_state() == 0)
+ if (get_run_state() == 0 && g_send_cnt[id] <= count + MAX_UNRECV_PACKET_NUM)
last_time--;
}
+ g_recv_state[id] = THREAD_COMPLETED;
recv_error:
add_recv_data(count, g_pktlen);
@@ -746,13 +755,11 @@ static void *zip_wd_blk_lz77_async_run(void *arg)
}
try_cnt = 0;
count++;
+ __atomic_add_fetch(&g_send_cnt[pdata->td_id], 1, __ATOMIC_RELAXED);
}
- while (1) {
- if (get_recv_time() > 0) // wait Async mode finish recv
- break;
+ while (g_recv_state[pdata->td_id] == THREAD_PROCESSING)
usleep(SEND_USLEEP);
- }
free(tag);
tag_err:
@@ -1011,13 +1018,11 @@ static void *zip_wd_blk_async_run(void *arg)
}
try_cnt = 0;
count++;
+ __atomic_add_fetch(&g_send_cnt[pdata->td_id], 1, __ATOMIC_RELAXED);
}
- while (1) {
- if (get_recv_time() > 0) // wait Async mode finish recv
- break;
+ while (g_recv_state[pdata->td_id] == THREAD_PROCESSING)
usleep(SEND_USLEEP);
- }
tag_release:
free(tag);
@@ -1107,6 +1112,7 @@ static int zip_wd_async_threads(struct acc_option *options)
for (i = 0; i < g_thread_num; i++) {
threads_args[i].td_id = i;
+ g_recv_state[i] = THREAD_PROCESSING;
/* poll thread */
ret = pthread_create(&pollid[i], NULL, zip_wd_poll, &threads_args[i]);
if (ret) {
@@ -1122,6 +1128,7 @@ static int zip_wd_async_threads(struct acc_option *options)
threads_args[i].comp_lv = threads_option.comp_lv;
threads_args[i].win_size = threads_option.win_size;
threads_args[i].td_id = i;
+ g_send_cnt[i] = 0;
ret = pthread_create(&tdid[i], NULL, wd_zip_async_run, &threads_args[i]);
if (ret) {
ZIP_TST_PRT("Create async thread fail!\n");
--
2.25.1

641
0041-uadk_tool-fix-queue-application-failure-from-multipl.patch Normal file
View File

@ -0,0 +1,641 @@
From 5210ac8a3f616f381d3990e3ca3f92bf23383f25 Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Mon, 11 Mar 2024 16:41:41 +0800
Subject: [PATCH 41/44] uadk_tool: fix queue application failure from multiple
devices
Specified device: apply queues from a designated device.
No specified device: apply queues from multiple devices.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
uadk_tool/benchmark/hpre_uadk_benchmark.c | 143 ++++++++++++++++-----
uadk_tool/benchmark/sec_uadk_benchmark.c | 141 +++++++++++++++-----
uadk_tool/benchmark/zip_uadk_benchmark.c | 150 ++++++++++++++++------
3 files changed, 329 insertions(+), 105 deletions(-)
diff --git a/uadk_tool/benchmark/hpre_uadk_benchmark.c b/uadk_tool/benchmark/hpre_uadk_benchmark.c
index 729728f..0148e56 100644
--- a/uadk_tool/benchmark/hpre_uadk_benchmark.c
+++ b/uadk_tool/benchmark/hpre_uadk_benchmark.c
@@ -344,21 +344,17 @@ static int hpre_uadk_param_parse(thread_data *tddata, struct acc_option *options
return 0;
}
-static int init_hpre_ctx_config(struct acc_option *options)
+static int specified_device_request_ctx(struct acc_option *options)
{
- struct uacce_dev_list *list, *tmp;
- int subtype = options->subtype;
+ struct uacce_dev_list *list = NULL;
+ struct uacce_dev_list *tmp = NULL;
char *alg = options->algclass;
int mode = options->syncmode;
struct uacce_dev *dev = NULL;
- struct sched_params param;
- int max_node, i;
+ int avail_ctx = 0;
char *dev_name;
int ret = 0;
-
- max_node = numa_max_node() + 1;
- if (max_node <= 0)
- return -EINVAL;
+ int i = 0;
list = wd_get_accel_list(alg);
if (!list) {
@@ -366,15 +362,11 @@ static int init_hpre_ctx_config(struct acc_option *options)
return -ENODEV;
}
- if (strlen(options->device) == 0) {
- dev = list->dev;
- } else {
- for (tmp = list; tmp; tmp = tmp->next) {
- dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
- if (!strcmp(dev_name, options->device)) {
- dev = tmp->dev;
- break;
- }
+ for (tmp = list; tmp != NULL; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
}
}
@@ -384,30 +376,114 @@ static int init_hpre_ctx_config(struct acc_option *options)
goto free_list;
}
- /* If there is no numa, we defualt config to zero */
- if (dev->numa_id < 0)
- dev->numa_id = 0;
-
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs) {
- ret = -ENOMEM;
+ avail_ctx = wd_get_avail_ctx(dev);
+ if (avail_ctx < 0) {
+ HPRE_TST_PRT("failed to get the number of available ctx from %s\n", options->device);
+ ret = avail_ctx;
+ goto free_list;
+ } else if (avail_ctx < g_ctxnum) {
+ HPRE_TST_PRT("error: not enough ctx available in %s\n", options->device);
+ ret = -ENODEV;
goto free_list;
}
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
for (i = 0; i < g_ctxnum; i++) {
g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
if (!g_ctx_cfg.ctxs[i].ctx) {
HPRE_TST_PRT("failed to alloc %dth ctx\n", i);
- ret = -ENODEV;
+ ret = -ENOMEM;
goto free_ctx;
}
-
g_ctx_cfg.ctxs[i].op_type = 0;
g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
+ wd_free_list_accels(list);
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+free_list:
+ wd_free_list_accels(list);
+
+ return ret;
+}
+
+static int non_specified_device_request_ctx(struct acc_option *options)
+{
+ char *alg = options->algclass;
+ int mode = options->syncmode;
+ struct uacce_dev *dev = NULL;
+ int ret = 0;
+ int i = 0;
+
+ while (i < g_ctxnum) {
+ dev = wd_get_accel_dev(alg);
+ if (!dev) {
+ HPRE_TST_PRT("failed to get %s device\n", alg);
+ ret = -ENODEV;
+ goto free_ctx;
+ }
+
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ for (; i < g_ctxnum; i++) {
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx)
+ break;
+
+ g_ctx_cfg.ctxs[i].op_type = 0;
+ g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
+ }
+
+ free(dev);
+ }
+
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+ return ret;
+}
+
+static int init_hpre_ctx_config(struct acc_option *options)
+{
+ struct sched_params param = {0};
+ int subtype = options->subtype;
+ int mode = options->syncmode;
+ int max_node;
+ int ret = 0;
+
+ max_node = numa_max_node() + 1;
+ if (max_node <= 0)
+ return -EINVAL;
+
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs)
+ return -ENOMEM;
+
+ if (strlen(options->device) != 0)
+ ret = specified_device_request_ctx(options);
+ else
+ ret = non_specified_device_request_ctx(options);
+
+ if (ret) {
+ HPRE_TST_PRT("failed to request hpre ctx!\n");
+ goto free_ctxs;
+ }
+
switch(subtype) {
case RSA_TYPE:
g_sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 1, max_node, wd_rsa_poll_ctx);
@@ -460,7 +536,7 @@ static int init_hpre_ctx_config(struct acc_option *options)
break;
}
if (ret) {
- HPRE_TST_PRT("failed to get hpre ctx!\n");
+ HPRE_TST_PRT("failed to init hpre ctx!\n");
goto free_sched;
}
@@ -470,12 +546,11 @@ free_sched:
wd_sched_rr_release(g_sched);
free_ctx:
- for (; i >= 0; i--)
+ for (int i = g_ctxnum; i >= 0; i--)
wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
- free(g_ctx_cfg.ctxs);
-free_list:
- wd_free_list_accels(list);
+free_ctxs:
+ free(g_ctx_cfg.ctxs);
return ret;
}
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index 2c12c20..56f4fa6 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -544,21 +544,17 @@ static int sec_uadk_param_parse(thread_data *tddata, struct acc_option *options)
return 0;
}
-static int init_ctx_config(struct acc_option *options)
+static int specified_device_request_ctx(struct acc_option *options)
{
- struct uacce_dev_list *list, *tmp;
- struct sched_params param = {0};
- int subtype = options->subtype;
+ struct uacce_dev_list *list = NULL;
+ struct uacce_dev_list *tmp = NULL;
char *alg = options->algclass;
int mode = options->syncmode;
struct uacce_dev *dev = NULL;
- int max_node, i;
+ int avail_ctx = 0;
char *dev_name;
int ret = 0;
-
- max_node = numa_max_node() + 1;
- if (max_node <= 0)
- return -EINVAL;
+ int i = 0;
list = wd_get_accel_list(alg);
if (!list) {
@@ -566,15 +562,11 @@ static int init_ctx_config(struct acc_option *options)
return -ENODEV;
}
- if (strlen(options->device) == 0) {
- dev = list->dev;
- } else {
- for (tmp = list; tmp; tmp = tmp->next) {
- dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
- if (!strcmp(dev_name, options->device)) {
- dev = tmp->dev;
- break;
- }
+ for (tmp = list; tmp != NULL; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
}
}
@@ -584,18 +576,21 @@ static int init_ctx_config(struct acc_option *options)
goto free_list;
}
- /* If there is no numa, we defualt config to zero */
- if (dev->numa_id < 0)
- dev->numa_id = 0;
-
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs) {
- ret = -ENOMEM;
+ avail_ctx = wd_get_avail_ctx(dev);
+ if (avail_ctx < 0) {
+ SEC_TST_PRT("failed to get the number of available ctx from %s\n", options->device);
+ ret = avail_ctx;
+ goto free_list;
+ } else if (avail_ctx < g_ctxnum) {
+ SEC_TST_PRT("error: not enough ctx available in %s\n", options->device);
+ ret = -ENODEV;
goto free_list;
}
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
for (i = 0; i < g_ctxnum; i++) {
g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
if (!g_ctx_cfg.ctxs[i].ctx) {
@@ -603,11 +598,92 @@ static int init_ctx_config(struct acc_option *options)
ret = -ENOMEM;
goto free_ctx;
}
-
g_ctx_cfg.ctxs[i].op_type = 0;
g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
+ wd_free_list_accels(list);
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+free_list:
+ wd_free_list_accels(list);
+
+ return ret;
+}
+
+static int non_specified_device_request_ctx(struct acc_option *options)
+{
+ char *alg = options->algclass;
+ int mode = options->syncmode;
+ struct uacce_dev *dev = NULL;
+ int ret = 0;
+ int i = 0;
+
+ while (i < g_ctxnum) {
+ dev = wd_get_accel_dev(alg);
+ if (!dev) {
+ SEC_TST_PRT("failed to get %s device\n", alg);
+ ret = -ENODEV;
+ goto free_ctx;
+ }
+
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ for (; i < g_ctxnum; i++) {
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx)
+ break;
+
+ g_ctx_cfg.ctxs[i].op_type = 0;
+ g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
+ }
+
+ free(dev);
+ }
+
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+ return ret;
+}
+
+static int init_ctx_config(struct acc_option *options)
+{
+ struct sched_params param = {0};
+ int subtype = options->subtype;
+ int mode = options->syncmode;
+ int max_node;
+ int ret = 0;
+
+ max_node = numa_max_node() + 1;
+ if (max_node <= 0)
+ return -EINVAL;
+
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs)
+ return -ENOMEM;
+
+ if (strlen(options->device) != 0)
+ ret = specified_device_request_ctx(options);
+ else
+ ret = non_specified_device_request_ctx(options);
+
+ if (ret) {
+ SEC_TST_PRT("failed to request sec ctx!\n");
+ goto free_ctxs;
+ }
+
switch(subtype) {
case CIPHER_TYPE:
g_sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 1, max_node, wd_cipher_poll_ctx);
@@ -652,7 +728,7 @@ static int init_ctx_config(struct acc_option *options)
break;
}
if (ret) {
- SEC_TST_PRT("failed to cipher ctx!\n");
+ SEC_TST_PRT("failed to init sec ctx!\n");
goto free_sched;
}
@@ -662,12 +738,11 @@ free_sched:
wd_sched_rr_release(g_sched);
free_ctx:
- for (; i >= 0; i--)
+ for (int i = g_ctxnum; i >= 0; i--)
wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
- free(g_ctx_cfg.ctxs);
-free_list:
- wd_free_list_accels(list);
+free_ctxs:
+ free(g_ctx_cfg.ctxs);
return ret;
}
diff --git a/uadk_tool/benchmark/zip_uadk_benchmark.c b/uadk_tool/benchmark/zip_uadk_benchmark.c
index 1dd3990..e2876a9 100644
--- a/uadk_tool/benchmark/zip_uadk_benchmark.c
+++ b/uadk_tool/benchmark/zip_uadk_benchmark.c
@@ -318,21 +318,17 @@ static int init_ctx_config2(struct acc_option *options)
return 0;
}
-static int init_ctx_config(struct acc_option *options)
+static int specified_device_request_ctx(struct acc_option *options)
{
- struct uacce_dev_list *list, *tmp;
+ struct uacce_dev_list *list = NULL;
+ struct uacce_dev_list *tmp = NULL;
char *alg = options->algclass;
- int optype = options->optype;
int mode = options->syncmode;
struct uacce_dev *dev = NULL;
- int max_node, i;
+ int avail_ctx = 0;
char *dev_name;
int ret = 0;
-
- optype = optype % WD_DIR_MAX;
- max_node = numa_max_node() + 1;
- if (max_node <= 0)
- return -EINVAL;
+ int i = 0;
list = wd_get_accel_list(alg);
if (!list) {
@@ -340,15 +336,11 @@ static int init_ctx_config(struct acc_option *options)
return -ENODEV;
}
- if (strlen(options->device) == 0) {
- dev = list->dev;
- } else {
- for (tmp = list; tmp; tmp = tmp->next) {
- dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
- if (!strcmp(dev_name, options->device)) {
- dev = tmp->dev;
- break;
- }
+ for (tmp = list; tmp != NULL; tmp = tmp->next) {
+ dev_name = strrchr(tmp->dev->dev_root, '/') + 1;
+ if (!strcmp(dev_name, options->device)) {
+ dev = tmp->dev;
+ break;
}
}
@@ -358,29 +350,114 @@ static int init_ctx_config(struct acc_option *options)
goto free_list;
}
- /* If there is no numa, we defualt config to zero */
- if (dev->numa_id < 0)
- dev->numa_id = 0;
-
- memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
- g_ctx_cfg.ctx_num = g_ctxnum;
- g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
- if (!g_ctx_cfg.ctxs) {
- ret = -ENOMEM;
+ avail_ctx = wd_get_avail_ctx(dev);
+ if (avail_ctx < 0) {
+ ZIP_TST_PRT("failed to get the number of available ctx from %s\n", options->device);
+ ret = avail_ctx;
+ goto free_list;
+ } else if (avail_ctx < g_ctxnum) {
+ ZIP_TST_PRT("error: not enough ctx available in %s\n", options->device);
+ ret = -ENODEV;
goto free_list;
}
- for (i = 0; i < g_ctxnum; i++) {
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ for (; i < g_ctxnum; i++) {
g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
if (!g_ctx_cfg.ctxs[i].ctx) {
ZIP_TST_PRT("failed to alloc %dth ctx\n", i);
+ ret = -ENOMEM;
goto free_ctx;
}
-
- g_ctx_cfg.ctxs[i].op_type = optype;
+ g_ctx_cfg.ctxs[i].op_type = 0;
g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
}
+ wd_free_list_accels(list);
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+free_list:
+ wd_free_list_accels(list);
+
+ return ret;
+}
+
+static int non_specified_device_request_ctx(struct acc_option *options)
+{
+ char *alg = options->algclass;
+ int mode = options->syncmode;
+ struct uacce_dev *dev = NULL;
+ int ret = 0;
+ int i = 0;
+
+ while (i < g_ctxnum) {
+ dev = wd_get_accel_dev(alg);
+ if (!dev) {
+ ZIP_TST_PRT("failed to get %s device\n", alg);
+ ret = -ENODEV;
+ goto free_ctx;
+ }
+
+ /* If there is no numa, we default config to zero */
+ if (dev->numa_id < 0)
+ dev->numa_id = 0;
+
+ for (; i < g_ctxnum; i++) {
+ g_ctx_cfg.ctxs[i].ctx = wd_request_ctx(dev);
+ if (!g_ctx_cfg.ctxs[i].ctx)
+ break;
+
+ g_ctx_cfg.ctxs[i].op_type = 0;
+ g_ctx_cfg.ctxs[i].ctx_mode = (__u8)mode;
+ }
+
+ free(dev);
+ }
+
+ return 0;
+
+free_ctx:
+ for (; i >= 0; i--)
+ wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
+
+ return ret;
+}
+
+static int init_ctx_config(struct acc_option *options)
+{
+ int optype = options->optype;
+ int mode = options->syncmode;
+ int max_node;
+ int ret = 0;
+
+ optype = optype % WD_DIR_MAX;
+ max_node = numa_max_node() + 1;
+ if (max_node <= 0)
+ return -EINVAL;
+
+ memset(&g_ctx_cfg, 0, sizeof(struct wd_ctx_config));
+ g_ctx_cfg.ctx_num = g_ctxnum;
+ g_ctx_cfg.ctxs = calloc(g_ctxnum, sizeof(struct wd_ctx));
+ if (!g_ctx_cfg.ctxs)
+ return -ENOMEM;
+
+ if (strlen(options->device) != 0)
+ ret = specified_device_request_ctx(options);
+ else
+ ret = non_specified_device_request_ctx(options);
+
+ if (ret) {
+ ZIP_TST_PRT("failed to request zip ctx!\n");
+ goto free_ctxs;
+ }
+
g_sched = wd_sched_rr_alloc(SCHED_POLICY_RR, 2, max_node, wd_comp_poll_ctx);
if (!g_sched) {
ZIP_TST_PRT("failed to alloc sched!\n");
@@ -394,7 +471,7 @@ static int init_ctx_config(struct acc_option *options)
* All contexts for 2 modes & 2 types.
* The test only uses one kind of contexts at the same time.
*/
- param.numa_id = dev->numa_id;
+ param.numa_id = 0;
param.type = optype;
param.mode = mode;
param.begin = 0;
@@ -407,24 +484,21 @@ static int init_ctx_config(struct acc_option *options)
ret = wd_comp_init(&g_ctx_cfg, g_sched);
if (ret) {
- ZIP_TST_PRT("failed to cipher ctx!\n");
+ ZIP_TST_PRT("failed to init zip ctx!\n");
goto free_sched;
}
- wd_free_list_accels(list);
-
return 0;
free_sched:
wd_sched_rr_release(g_sched);
free_ctx:
- for (; i >= 0; i--)
+ for (int i = g_ctxnum; i >= 0; i--)
wd_release_ctx(g_ctx_cfg.ctxs[i].ctx);
- free(g_ctx_cfg.ctxs);
-free_list:
- wd_free_list_accels(list);
+free_ctxs:
+ free(g_ctx_cfg.ctxs);
return ret;
}
--
2.25.1

54
0042-ecc-check-need_debug-before-calling-WD_DEBUG.patch Normal file
View File

@ -0,0 +1,54 @@
From ba54780c666c7f655cf6b18d0072e1e892656252 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Wed, 3 Apr 2024 11:24:52 +0800
Subject: [PATCH 42/44] ecc: check need_debug before calling WD_DEBUG
Before calling WD_DEBUG, check whether debug logs need to be recorded
to prevent the syslog syscall from affecting the performance.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: JiangShui Yang <yangjiangshui@h-partners.com>
---
wd_ecc.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/wd_ecc.c b/wd_ecc.c
index e75bca0..65727e7 100644
--- a/wd_ecc.c
+++ b/wd_ecc.c
@@ -997,20 +997,19 @@ static int fill_user_curve_cfg(struct wd_ecc_curve *param,
struct wd_ecc_sess_setup *setup)
{
struct wd_ecc_curve *src_param = setup->cv.cfg.pparam;
- __u32 curve_id;
+ bool need_debug = wd_need_debug();
+ __u32 curve_id = 0;
int ret = 0;
if (setup->cv.type == WD_CV_CFG_ID) {
curve_id = setup->cv.cfg.id;
ret = fill_param_by_id(param, setup->key_bits, curve_id);
- WD_DEBUG("set curve id %u!\n", curve_id);
} else if (setup->cv.type == WD_CV_CFG_PARAM) {
ret = set_key_cv(param, src_param);
if (ret) {
WD_ERR("failed to set key cv!\n");
return ret;
}
- WD_DEBUG("set curve by user param!\n");
} else {
WD_ERR("invalid: fill curve cfg type %u is error!\n", setup->cv.type);
return -WD_EINVAL;
@@ -1022,6 +1021,9 @@ static int fill_user_curve_cfg(struct wd_ecc_curve *param,
return -WD_EINVAL;
}
+ if (need_debug)
+ WD_DEBUG("curve cfg type is %u, curve_id is %u!\n", setup->cv.type, curve_id);
+
return ret;
}
--
2.25.1

28
0043-uadk-remove-unused-ioctl-cmd.patch Normal file
View File

@ -0,0 +1,28 @@
From b6aaaaf9eeb1061806c1a00faddd1ce91e5afa33 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Wed, 3 Apr 2024 11:24:53 +0800
Subject: [PATCH 43/44] uadk: remove unused ioctl cmd
Remove unused ioctl cmd UACCE_CMD_GET_SS_DMA.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: JiangShui Yang <yangjiangshui@h-partners.com>
---
include/uacce.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/uacce.h b/include/uacce.h
index fb3fb22..bb8d740 100644
--- a/include/uacce.h
+++ b/include/uacce.h
@@ -15,7 +15,6 @@ extern "C" {
#define UACCE_CMD_START _IO('W', 0)
#define UACCE_CMD_PUT_Q _IO('W', 1)
-#define UACCE_CMD_GET_SS_DMA _IOR('W', 100, unsigned long)
/**
* UACCE Device flags:
--
2.25.1

247
0044-uadk-v1-remove-dummy.patch Normal file
View File

@ -0,0 +1,247 @@
From deec45b9919adbdf968eae688003b96e69a77011 Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Wed, 3 Apr 2024 11:24:54 +0800
Subject: [PATCH 44/44] uadk: v1: remove dummy
dummy is no longer use, remove it.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: JiangShui Yang <yangjiangshui@h-partners.com>
---
Makefile.am | 1 -
v1/internal/wd_dummy_usr_if.h | 45 ------------
v1/test/test_dummy.c | 126 ----------------------------------
v1/wd_adapter.c | 13 ----
4 files changed, 185 deletions(-)
delete mode 100644 v1/internal/wd_dummy_usr_if.h
delete mode 100644 v1/test/test_dummy.c
diff --git a/Makefile.am b/Makefile.am
index 68f3106..1049639 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -60,7 +60,6 @@ libwd_la_SOURCES=wd.c wd_mempool.c wd.h wd_alg.c wd_alg.h \
v1/wd_bmm.c v1/wd_bmm.h \
v1/wd_ecc.c v1/wd_ecc.h \
v1/wd_sgl.c v1/wd_sgl.h \
- v1/drv/dummy_drv.c v1/drv/dummy_drv.h \
v1/drv/hisi_qm_udrv.c v1/drv/hisi_qm_udrv.h \
v1/drv/hisi_zip_udrv.c v1/drv/hisi_zip_udrv.h \
v1/drv/hisi_hpre_udrv.c v1/drv/hisi_hpre_udrv.h \
diff --git a/v1/internal/wd_dummy_usr_if.h b/v1/internal/wd_dummy_usr_if.h
deleted file mode 100644
index b5673ec..0000000
--- a/v1/internal/wd_dummy_usr_if.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Copyright 2019 Huawei Technologies Co.,Ltd.All rights reserved.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*
- * This file defines the dummy algo interface between the user
- * and kernel space
- */
-
-#ifndef __DUMMY_USR_IF_H
-#define __DUMMY_USR_IF_H
-
-
-/* Algorithm name */
-#define AN_DUMMY_MEMCPY "memcopy"
-
-#define AAN_AFLAGS "aflags"
-#define AAN_MAX_COPY_SIZE "max_copy_size"
-
-struct wd_dummy_cpy_param {
- int flags;
- int max_copy_size;
-};
-
-struct wd_dummy_cpy_msg {
- char *src_addr;
- char *tgt_addr;
- size_t size;
- void *ptr;
- __u32 ret;
-};
-
-#endif
diff --git a/v1/test/test_dummy.c b/v1/test/test_dummy.c
deleted file mode 100644
index 75ab33a..0000000
--- a/v1/test/test_dummy.c
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * Copyright 2018-2019 Huawei Technologies Co.,Ltd.All rights reserved.
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "../config.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/types.h>
-#include <unistd.h>
-
-#include "wd_sched.h"
-#include "wd_dummy_usr_if.h"
-#include "dummy_hw_usr_if.h"
-
-#define CPSZ 4096
-
-#define SYS_ERR_COND(cond, msg) if(cond) { \
- perror(msg); \
- exit(EXIT_FAILURE); }
-
-struct wd_dummy_cpy_msg *msgs;
-
-int wd_dummy_memcpy(struct wd_queue *q, void *dst, void *src, size_t size)
-{
- struct wd_dummy_cpy_msg req, *resp;
- int ret;
-
- req.src_addr = src;
- req.tgt_addr = dst;
- req.size = size;
-
- ret = wd_send(q, (void *)&req);
- if (ret)
- return ret;
-
- return wd_recv_sync(q, (void **)&resp, 1000);
-}
-
-static void wd_dummy_sched_init_cache(struct wd_scheduler *sched, int i)
-{
- sched->msgs[i].msg = &msgs[i];
- msgs[i].src_addr = sched->msgs[i].data_in;
- msgs[i].tgt_addr = sched->msgs[i].data_out;
- msgs[i].size = sched->msg_data_size;
-}
-
-static int input_num = 10;
-static int wd_dummy_sched_input(struct wd_msg *msg, void *priv)
-{
- SYS_ERR_COND(input_num <= 0, "input");
- input_num--;
- memset(msg->data_in, '0'+input_num, CPSZ);
- memset(msg->data_out, 'x', CPSZ);
-
- return 0;
-}
-
-static int wd_dummy_sched_output(struct wd_msg *msg, void *priv)
-{
- int i;
- char *in, *out;
-
- for (i = 0; i < CPSZ; i++) {
- in = (char *)msg->data_in;
- out = (char *)msg->data_out;
- if(in[i] != out[i]) {
- printf("verify result fail on %d\n", i);
- break;
- }
-
- }
- printf("verify result (%d) success (remained=%d)\n", in[0], input_num);
-
- return 0;
-}
-
-struct wd_scheduler sched = {
- .q_num = 1,
- .ss_region_size = 0,
- .msg_cache_num = 4,
- .msg_data_size = CPSZ,
- .init_cache = wd_dummy_sched_init_cache,
- .input = wd_dummy_sched_input,
- .output = wd_dummy_sched_output,
-};
-
-int main(int argc, char *argv[])
-{
- int ret, i;
- int max_step = 20;
-
- sched.qs = calloc(sched.q_num, sizeof(*sched.qs));
- SYS_ERR_COND(!sched.qs, "calloc");
-
- msgs = calloc(sched.msg_cache_num, sizeof(*msgs));
- SYS_ERR_COND(!msgs, "calloc");
-
- for (i = 0; i < sched.q_num; i++)
- sched.qs[i].capa.alg = "memcpy";
-
- ret = wd_sched_init(&sched);
- SYS_ERR_COND(ret, "wd_sched_init");
-
- while(input_num || !wd_sched_empty(&sched)) {
- ret = wd_sched_work(&sched, input_num);
- SYS_ERR_COND(ret < 0, "wd_sched_work");
- SYS_ERR_COND(max_step-- < 0, "max_step");
- }
-
- wd_sched_fini(&sched);
- free(sched.qs);
- return EXIT_SUCCESS;
-}
diff --git a/v1/wd_adapter.c b/v1/wd_adapter.c
index d574200..b9b841d 100644
--- a/v1/wd_adapter.c
+++ b/v1/wd_adapter.c
@@ -20,7 +20,6 @@
#include "config.h"
#include "v1/wd_util.h"
-#include "v1/drv/dummy_drv.h"
#include "v1/drv/hisi_qm_udrv.h"
#include "v1/drv/hisi_rng_udrv.h"
#include "v1/wd_adapter.h"
@@ -29,18 +28,6 @@
#define ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a)-1)
static const struct wd_drv_dio_if hw_dio_tbl[] = { {
- .hw_type = "dummy_v1",
- .open = dummy_set_queue_dio,
- .close = dummy_unset_queue_dio,
- .send = dummy_add_to_dio_q,
- .recv = dummy_get_from_dio_q,
- }, {
- .hw_type = "dummy_v2",
- .open = dummy_set_queue_dio,
- .close = dummy_unset_queue_dio,
- .send = dummy_add_to_dio_q,
- .recv = dummy_get_from_dio_q,
- }, {
.hw_type = HISI_QM_API_VER_BASE WD_UACCE_API_VER_NOIOMMU_SUBFIX,
.open = qm_init_queue,
.close = qm_uninit_queue,
--
2.25.1

114
0045-cipher-optimze-input-lengths-check.patch Normal file
View File

@ -0,0 +1,114 @@
From 4e1a4eb28f0e476cf4587d56b5cef4350b33ab82 Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 16:53:04 +0800
Subject: [PATCH 45/52] cipher: optimze input lengths check
It is more reasonable to check the input lengths of various cipher
algorithms at the algorithm layer.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_sec.c | 19 +++++--------------
wd_cipher.c | 26 ++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 14 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 852340d..6625c41 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -960,10 +960,9 @@ static void parse_cipher_bd2(struct hisi_qp *qp, struct hisi_sec_sqe *sqe,
dump_sec_msg(temp_msg, "cipher");
}
-static int aes_sm4_len_check(struct wd_cipher_msg *msg)
+static int aes_len_check(struct wd_cipher_msg *msg)
{
- if (msg->alg == WD_CIPHER_AES &&
- msg->in_bytes <= AES_BLOCK_SIZE &&
+ if (msg->in_bytes <= AES_BLOCK_SIZE &&
(msg->mode == WD_CIPHER_CBC_CS1 ||
msg->mode == WD_CIPHER_CBC_CS2 ||
msg->mode == WD_CIPHER_CBC_CS3)) {
@@ -972,13 +971,6 @@ static int aes_sm4_len_check(struct wd_cipher_msg *msg)
return -WD_EINVAL;
}
- if ((msg->in_bytes & (AES_BLOCK_SIZE - 1)) &&
- (msg->mode == WD_CIPHER_CBC || msg->mode == WD_CIPHER_ECB)) {
- WD_ERR("failed to check input bytes of AES or SM4, size = %u\n",
- msg->in_bytes);
- return -WD_EINVAL;
- }
-
return 0;
}
@@ -986,8 +978,7 @@ static int cipher_len_check(struct wd_cipher_msg *msg)
{
int ret;
- if (msg->in_bytes > MAX_INPUT_DATA_LEN ||
- !msg->in_bytes) {
+ if (msg->in_bytes > MAX_INPUT_DATA_LEN) {
WD_ERR("input cipher length is error, size = %u\n",
msg->in_bytes);
return -WD_EINVAL;
@@ -1016,8 +1007,8 @@ static int cipher_len_check(struct wd_cipher_msg *msg)
return 0;
}
- if (msg->alg == WD_CIPHER_AES || msg->alg == WD_CIPHER_SM4) {
- ret = aes_sm4_len_check(msg);
+ if (msg->alg == WD_CIPHER_AES) {
+ ret = aes_len_check(msg);
if (ret)
return ret;
}
diff --git a/wd_cipher.c b/wd_cipher.c
index f35ce6f..279ca8b 100644
--- a/wd_cipher.c
+++ b/wd_cipher.c
@@ -565,6 +565,28 @@ static int cipher_iv_len_check(struct wd_cipher_req *req,
return ret;
}
+static int cipher_len_check(handle_t h_sess, struct wd_cipher_req *req)
+{
+ struct wd_cipher_sess *sess = (struct wd_cipher_sess *)h_sess;
+
+ if (!req->in_bytes) {
+ WD_ERR("invalid: cipher input length is zero!\n");
+ return -WD_EINVAL;
+ }
+
+ if (sess->alg != WD_CIPHER_AES && sess->alg != WD_CIPHER_SM4)
+ return 0;
+
+ if ((req->in_bytes & (AES_BLOCK_SIZE - 1)) &&
+ (sess->mode == WD_CIPHER_CBC || sess->mode == WD_CIPHER_ECB)) {
+ WD_ERR("failed to check input bytes of AES or SM4, size = %u\n",
+ req->in_bytes);
+ return -WD_EINVAL;
+ }
+
+ return 0;
+}
+
static int wd_cipher_check_params(handle_t h_sess,
struct wd_cipher_req *req, __u8 mode)
{
@@ -587,6 +609,10 @@ static int wd_cipher_check_params(handle_t h_sess,
return -WD_EINVAL;
}
+ ret = cipher_len_check(h_sess, req);
+ if (unlikely(ret))
+ return ret;
+
ret = wd_check_src_dst(req->src, req->in_bytes, req->dst, req->out_bytes);
if (unlikely(ret)) {
WD_ERR("invalid: src/dst addr is NULL when src/dst size is non-zero!\n");
--
2.25.1

54
0046-uadk-v1-improve-the-judgment-conditions-of-tag.patch Normal file
View File

@ -0,0 +1,54 @@
From 628139bccaff2499d35cb530f54519f0aa744923 Mon Sep 17 00:00:00 2001
From: Longfang Liu <liulongfang@huawei.com>
Date: Fri, 29 Mar 2024 16:54:41 +0800
Subject: [PATCH 46/52] uadk/v1: improve the judgment conditions of tag
Before calling this function, it is guaranteed that the tag is
not empty.
In addition, some alarm issues in hpre have been modified.
Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_hpre_udrv.c | 4 ++--
v1/drv/hisi_sec_udrv.c | 3 +--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/v1/drv/hisi_hpre_udrv.c b/v1/drv/hisi_hpre_udrv.c
index de614f2..eaee4b1 100644
--- a/v1/drv/hisi_hpre_udrv.c
+++ b/v1/drv/hisi_hpre_udrv.c
@@ -212,13 +212,13 @@ static int qm_fill_rsa_pubkey(struct wcrypto_rsa_pubkey *pubkey, void **data)
wd_e->bsize, wd_e->dsize, "rsa pubkey e");
if (unlikely(ret))
return ret;
- wd_e->dsize = wd_e->dsize;
+ wd_e->dsize = wd_e->bsize;
ret = qm_crypto_bin_to_hpre_bin(wd_n->data, (const char *)wd_n->data,
wd_n->bsize, wd_n->dsize, "rsa pubkey n");
if (unlikely(ret))
return ret;
- wd_n->dsize = wd_n->dsize;
+ wd_n->dsize = wd_n->bsize;
*data = wd_e->data;
return (int)(wd_n->bsize + wd_e->bsize);
diff --git a/v1/drv/hisi_sec_udrv.c b/v1/drv/hisi_sec_udrv.c
index d046327..c0bd73d 100644
--- a/v1/drv/hisi_sec_udrv.c
+++ b/v1/drv/hisi_sec_udrv.c
@@ -759,8 +759,7 @@ static int fill_cipher_bd2(struct wd_queue *q, struct hisi_sec_sqe *sqe,
return ret;
}
- if (tag)
- sqe->type2.tag = tag->wcrypto_tag.ctx_id;
+ sqe->type2.tag = tag->wcrypto_tag.ctx_id;
return ret;
}
--
2.25.1

39
0047-uadk-v1-fix-for-sec-cipher-bd1-ci_gen-configuration.patch Normal file
View File

@ -0,0 +1,39 @@
From f59a72aefeb714c95bddca71431e95746094d6f7 Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 16:56:43 +0800
Subject: [PATCH 47/52] uadk/v1: fix for sec cipher bd1 ci_gen configuration
In storage scenarios, the XTS mode is used for encrypting and decrypting
data on and off disks. According to the definition of this mode, the input
parameter to genarate IV is the LBA, so update SEC bd1 xts mode CI_GEN
from 0 to 3, which means use LBA mode.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_sec_udrv.c | 9 ++++-----
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/v1/drv/hisi_sec_udrv.c b/v1/drv/hisi_sec_udrv.c
index c0bd73d..d4e090a 100644
--- a/v1/drv/hisi_sec_udrv.c
+++ b/v1/drv/hisi_sec_udrv.c
@@ -312,11 +312,10 @@ static int fill_cipher_bd1_type(struct wcrypto_cipher_msg *msg,
fill_bd_addr_type(msg->data_fmt, sqe);
- /*
- * BD1 cipher only provides ci_gen=0 for compatibility, so user
- * should prepare iv[gran_num] and iv_bytes is sum of all grans
- */
- sqe->type1.ci_gen = CI_GEN_BY_ADDR;
+ if (msg->mode == WCRYPTO_CIPHER_XTS)
+ sqe->type1.ci_gen = CI_GEN_BY_LBA;
+ else
+ sqe->type1.ci_gen = CI_GEN_BY_ADDR;
return WD_SUCCESS;
}
--
2.25.1

43
0048-uadk-fix-for-shmget-shmflag.patch Normal file
View File

@ -0,0 +1,43 @@
From 0fc17f5c160cb6ea2d1f4b08e9884f29ff75b2dc Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 16:58:23 +0800
Subject: [PATCH 48/52] uadk: fix for shmget shmflag
The shmflag should be 0600 in octal, not 600 in decimal.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
uadk_tool/dfx/uadk_dfx.c | 2 +-
wd_util.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/uadk_tool/dfx/uadk_dfx.c b/uadk_tool/dfx/uadk_dfx.c
index 796135a..9c54b7b 100644
--- a/uadk_tool/dfx/uadk_dfx.c
+++ b/uadk_tool/dfx/uadk_dfx.c
@@ -16,7 +16,7 @@
#define uadk_build_date() printf("built on: %s %s\n", __DATE__, __TIME__)
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
-#define PRIVILEGE_FLAG 666
+#define PRIVILEGE_FLAG 0666
struct uadk_env_var {
const char *module;
diff --git a/wd_util.c b/wd_util.c
index fb58167..2635dc3 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -19,7 +19,7 @@
#define WD_BALANCE_THRHD 1280
#define WD_RECV_MAX_CNT_SLEEP 60000000
#define WD_RECV_MAX_CNT_NOSLEEP 200000000
-#define PRIVILEGE_FLAG 600
+#define PRIVILEGE_FLAG 0600
#define MIN(a, b) ((a) > (b) ? (b) : (a))
#define MAX(a, b) ((a) > (b) ? (a) : (b))
--
2.25.1

100
0049-sec-optimze-for-directly-assigning-values-to-structu.patch Normal file
View File

@ -0,0 +1,100 @@
From 705e33d624defc335cdb1c96335da684868858a3 Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 16:59:34 +0800
Subject: [PATCH 49/52] sec: optimze for directly assigning values to
structures
It is more reasonable to use pointers for value assignment.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_sec.c | 36 ++++++++++++------------------------
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 6625c41..b218cd8 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -542,66 +542,54 @@ static int hisi_sec_aead_recv_v3(struct wd_alg_driver *drv, handle_t ctx, void *
static int cipher_send(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_cipher_send(drv, ctx, msg);
return hisi_sec_cipher_send_v3(drv, ctx, msg);
}
static int cipher_recv(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_cipher_recv(drv, ctx, msg);
return hisi_sec_cipher_recv_v3(drv, ctx, msg);
}
static int digest_send(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_digest_send(drv, ctx, msg);
return hisi_sec_digest_send_v3(drv, ctx, msg);
}
static int digest_recv(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_digest_recv(drv, ctx, msg);
return hisi_sec_digest_recv_v3(drv, ctx, msg);
}
static int aead_send(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_aead_send(drv, ctx, msg);
return hisi_sec_aead_send_v3(drv, ctx, msg);
}
static int aead_recv(struct wd_alg_driver *drv, handle_t ctx, void *msg)
{
- handle_t h_qp = (handle_t)wd_ctx_get_priv(ctx);
- struct hisi_qp *qp = (struct hisi_qp *)h_qp;
- struct hisi_qm_queue_info q_info = qp->q_info;
+ struct hisi_qp *qp = (struct hisi_qp *)wd_ctx_get_priv(ctx);
- if (q_info.hw_type == HISI_QM_API_VER2_BASE)
+ if (qp->q_info.hw_type == HISI_QM_API_VER2_BASE)
return hisi_sec_aead_recv(drv, ctx, msg);
return hisi_sec_aead_recv_v3(drv, ctx, msg);
}
--
2.25.1

61
0050-util-optimize-for-wd_handle_msg_sync.patch Normal file
View File

@ -0,0 +1,61 @@
From f36aa5f7e8f82a90aa0cb729bf00cc51f76970d5 Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 17:01:03 +0800
Subject: [PATCH 50/52] util: optimize for wd_handle_msg_sync
1. Separate rx_cnt auto-increment and judgment.
2. Reduce the condition judgment in the case of eagain.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
wd_util.c | 26 +++++++++++++++-----------
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/wd_util.c b/wd_util.c
index 2635dc3..0744ff0 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -1822,24 +1822,28 @@ int wd_handle_msg_sync(struct wd_alg_driver *drv, struct wd_msg_handle *msg_hand
do {
if (epoll_en) {
ret = wd_ctx_wait(ctx, POLL_TIME);
- if (ret < 0)
+ if (unlikely(ret < 0))
WD_ERR("wd ctx wait timeout(%d)!\n", ret);
}
ret = msg_handle->recv(drv, ctx, msg);
- if (ret == -WD_EAGAIN) {
- if (unlikely(rx_cnt++ >= timeout)) {
- WD_ERR("failed to recv msg: timeout!\n");
- return -WD_ETIMEDOUT;
+ if (ret != -WD_EAGAIN) {
+ if (unlikely(ret < 0)) {
+ WD_ERR("failed to recv msg: error = %d!\n", ret);
+ return ret;
}
+ break;
+ }
- if (balance && *balance > WD_BALANCE_THRHD)
- usleep(1);
- } else if (unlikely(ret < 0)) {
- WD_ERR("failed to recv msg: error = %d!\n", ret);
- return ret;
+ rx_cnt++;
+ if (unlikely(rx_cnt >= timeout)) {
+ WD_ERR("failed to recv msg: timeout!\n");
+ return -WD_ETIMEDOUT;
}
- } while (ret < 0);
+
+ if (balance && *balance > WD_BALANCE_THRHD)
+ usleep(1);
+ } while (1);
if (balance)
*balance = rx_cnt;
--
2.25.1

115
0051-uadk-drv_hisi-optimize-qm-recv-function.patch Normal file
View File

@ -0,0 +1,115 @@
From ace1da03900d04a1e14d61200a89c539ff78856d Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 29 Mar 2024 17:02:23 +0800
Subject: [PATCH 51/52] uadk: drv_hisi - optimize qm recv function
Ensure that the value written by the hardware is
read from the memory each time, reduce the number
of packet receiving times by half.
Also sqe address is only need calculated when packets
are received.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_qm_udrv.c | 45 +++++++++++++++++++++++----------------------
1 file changed, 23 insertions(+), 22 deletions(-)
diff --git a/drv/hisi_qm_udrv.c b/drv/hisi_qm_udrv.c
index d8b5271..304764e 100644
--- a/drv/hisi_qm_udrv.c
+++ b/drv/hisi_qm_udrv.c
@@ -21,8 +21,8 @@
#define QM_DBELL_SQN_MASK 0x3ff
#define QM_DBELL_CMD_MASK 0xf
#define QM_Q_DEPTH 1024
-#define CQE_PHASE(cq) (__le16_to_cpu((cq)->w7) & 0x1)
-#define CQE_SQ_HEAD_INDEX(cq) (__le16_to_cpu((cq)->sq_head) & 0xffff)
+#define CQE_PHASE(cqe) (__le16_to_cpu((cqe)->w7) & 0x1)
+#define CQE_SQ_HEAD_INDEX(cqe) (__le16_to_cpu((cqe)->sq_head) & 0xffff)
#define VERSION_ID_SHIFT 9
#define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx)
@@ -505,32 +505,33 @@ int hisi_qm_send(handle_t h_qp, const void *req, __u16 expect, __u16 *count)
return 0;
}
-static int hisi_qm_recv_single(struct hisi_qm_queue_info *q_info, void *resp)
+static int hisi_qm_recv_single(struct hisi_qm_queue_info *q_info, handle_t h_ctx,
+ void *resp, __u16 idx)
{
- struct hisi_qp *qp = container_of(q_info, struct hisi_qp, q_info);
+ __u16 i, j, cqe_phase;
struct cqe *cqe;
- __u16 i, j;
pthread_spin_lock(&q_info->rv_lock);
i = q_info->cq_head_index;
cqe = q_info->cq_base + i * sizeof(struct cqe);
+ cqe_phase = CQE_PHASE(cqe);
+ /* Use dsb to read from memory and improve the receiving efficiency. */
+ rmb();
- if (q_info->cqc_phase == CQE_PHASE(cqe)) {
- /* Make sure cqe valid bit is set */
- rmb();
- j = CQE_SQ_HEAD_INDEX(cqe);
- if (unlikely(j >= q_info->sq_depth)) {
- pthread_spin_unlock(&q_info->rv_lock);
- WD_DEV_ERR(qp->h_ctx, "CQE_SQ_HEAD_INDEX(%u) error!\n", j);
- return -WD_EIO;
- }
- memcpy(resp, (void *)((uintptr_t)q_info->sq_base +
- j * q_info->sqe_size), q_info->sqe_size);
- } else {
+ if (q_info->cqc_phase != cqe_phase) {
pthread_spin_unlock(&q_info->rv_lock);
return -WD_EAGAIN;
}
+ j = CQE_SQ_HEAD_INDEX(cqe);
+ if (unlikely(j >= q_info->sq_depth)) {
+ pthread_spin_unlock(&q_info->rv_lock);
+ WD_DEV_ERR(h_ctx, "CQE_SQ_HEAD_INDEX(%u) error!\n", j);
+ return -WD_EIO;
+ }
+ memcpy((void *)((uintptr_t)resp + idx * q_info->sqe_size),
+ (void *)((uintptr_t)q_info->sq_base + j * q_info->sqe_size), q_info->sqe_size);
+
if (i == q_info->cq_depth - 1) {
q_info->cqc_phase = !(q_info->cqc_phase);
i = 0;
@@ -544,7 +545,7 @@ static int hisi_qm_recv_single(struct hisi_qm_queue_info *q_info, void *resp)
*/
if (unlikely(wd_ioread32(q_info->ds_rx_base) == 1)) {
pthread_spin_unlock(&q_info->rv_lock);
- WD_DEV_ERR(qp->h_ctx, "wd queue hw error happened after qm receive!\n");
+ WD_DEV_ERR(h_ctx, "wd queue hw error happened before qm receive!\n");
return -WD_HW_EACCESS;
}
@@ -565,8 +566,9 @@ int hisi_qm_recv(handle_t h_qp, void *resp, __u16 expect, __u16 *count)
{
struct hisi_qp *qp = (struct hisi_qp *)h_qp;
struct hisi_qm_queue_info *q_info;
- int recv_num = 0;
- int i, ret, offset;
+ __u16 recv_num = 0;
+ __u16 i;
+ int ret;
if (unlikely(!resp || !qp || !count))
return -WD_EINVAL;
@@ -581,8 +583,7 @@ int hisi_qm_recv(handle_t h_qp, void *resp, __u16 expect, __u16 *count)
}
for (i = 0; i < expect; i++) {
- offset = i * q_info->sqe_size;
- ret = hisi_qm_recv_single(q_info, resp + offset);
+ ret = hisi_qm_recv_single(q_info, qp->h_ctx, resp, i);
if (ret)
break;
recv_num++;
--
2.25.1

1307
0052-uadk-modify-uadk-static-compile.patch Normal file
View File

File diff suppressed because it is too large Load Diff

67
warpdrive.spec → libwd.spec
View File

@ -2,19 +2,10 @@
Name: libwd
Summary: User Space Accelerator Development Kit
Version: 2.6.0
Release: 2
Release: 3
License: Apache-2.0
Source: %{name}-%{version}.tar.gz
Patch01: 0001-uadk-fix-build-issue-of-pthread_atfork.patch
Patch02: 0002-uadk-fix-static-build-error.patch
Patch03: 0003-uadk-add-secure-compilation-option.patch
Patch04: 0004-uadk_tool-fix-build-error.patch
Patch05: 0005-v1-fix-build-error.patch
Patch06: 0006-wd_mempool-fix-build-error.patch
Patch07: 0007-wd_rsa-fix-build-error.patch
Patch08: 0008-test-fix-build-error.patch
Vendor: Huawei Corporation
ExclusiveOS: linux
URL: https://support.huawei.com
@ -26,6 +17,59 @@ BuildRequires: automake, autoconf, libtool, chrpath
BuildRequires: gcc, make
ExclusiveArch: aarch64
Patch01: 0001-uadk-fix-build-issue-of-pthread_atfork.patch
Patch02: 0002-uadk-fix-static-build-error.patch
Patch03: 0003-uadk-add-secure-compilation-option.patch
Patch04: 0004-uadk_tool-fix-build-error.patch
Patch05: 0005-v1-fix-build-error.patch
Patch06: 0006-wd_mempool-fix-build-error.patch
Patch07: 0007-wd_rsa-fix-build-error.patch
Patch08: 0008-test-fix-build-error.patch
Patch0009: 0009-uadk-sec-move-function-to-wd_digest_drv.h.patch
Patch0010: 0010-uadk-digest-add-partial_block-to-store-partial-data.patch
Patch0011: 0011-uadk-digest-add-wd_ctx_spin_lock-function.patch
Patch0012: 0012-uadk-remove-redundant-header-file-in-makefile.patch
Patch0013: 0013-uadk-isa-ce-support-sm3-ce-instruction.patch
Patch0014: 0014-uadk-fix-control-range-of-environmemt-variable.patch
Patch0015: 0015-uadk-util-use-default-sched_type-for-instruction-tas.patch
Patch0016: 0016-uadk-digest-modify-spelling-errors.patch
Patch0017: 0017-uadk-drv-hisi-fix-failed-to-init-drv-after-fork.patch
Patch0018: 0018-wd_rsa-fix-wd_rsa_common_uninit-re-entry.patch
Patch0019: 0019-wd_dh-Fix-wd_aead_uninit-re-entry.patch
Patch0020: 0020-wd_ecc-Fix-wd_ecc_uninit-re-entry.patch
Patch0021: 0021-wd_digest-uninit-check-status-in-one-func.patch
Patch0022: 0022-wd_aead-uninit-check-status-in-one-func.patch
Patch0023: 0023-makefile-install-wd_zlibwrapper.h-to-system.patch
Patch0024: 0024-conf-fix-includedir.patch
Patch0025: 0025-cipher-add-support-for-SM4-CBC-and-CTR-modes-in-CE-i.patch
Patch0026: 0026-cipher-add-support-for-SM4-CFB-and-XTS-modes-in-CE-i.patch
Patch0027: 0027-cipher-add-support-for-SM4-ECB-algorithm-in-CE-instr.patch
Patch0028: 0028-uadk-cipher-isa_ce-support-SM4-cbc_cts-mode.patch
Patch0029: 0029-uadk-wd_alg-check-whether-the-platform-supports-SVE.patch
Patch0030: 0030-uadk-sched-fix-async-mode-ctx-id.patch
Patch0031: 0031-uadk-initializes-ctx-resources-in-SVE-mode.patch
Patch0032: 0032-uadk-hash_mb-support-multi-buffer-calculation-for-sm.patch
Patch0033: 0033-uadk_tool-fix-aead-performance-test-issue.patch
Patch0034: 0034-uadk_tool-fix-the-logic-for-counting-retransmissions.patch
Patch0035: 0035-uadk-tools-support-the-nosva-test-of-a-specified-dev.patch
Patch0036: 0036-uadk-tools-support-designated-device-testing.patch
Patch0037: 0037-uadk_tool-support-sm3-ce-benchmark-and-function-test.patch
Patch0038: 0038-uadk_tool-support-sm4-ce-benchmark-test.patch
Patch0039: 0039-uadk_tool-support-sm3-md5-multibuff-benchmark-test.patch
Patch0040: 0040-uadk-tool-fix-the-msg-pool-release-bug-of-async-zip-.patch
Patch0041: 0041-uadk_tool-fix-queue-application-failure-from-multipl.patch
Patch0042: 0042-ecc-check-need_debug-before-calling-WD_DEBUG.patch
Patch0043: 0043-uadk-remove-unused-ioctl-cmd.patch
Patch0044: 0044-uadk-v1-remove-dummy.patch
Patch0045: 0045-cipher-optimze-input-lengths-check.patch
Patch0046: 0046-uadk-v1-improve-the-judgment-conditions-of-tag.patch
Patch0047: 0047-uadk-v1-fix-for-sec-cipher-bd1-ci_gen-configuration.patch
Patch0048: 0048-uadk-fix-for-shmget-shmflag.patch
Patch0049: 0049-sec-optimze-for-directly-assigning-values-to-structu.patch
Patch0050: 0050-util-optimize-for-wd_handle_msg_sync.patch
Patch0051: 0051-uadk-drv_hisi-optimize-qm-recv-function.patch
Patch0052: 0052-uadk-modify-uadk-static-compile.patch
%description
This package contains the User Space Accelerator Library
for hardware accelerator, compress, symmetric encryption
@ -102,6 +146,9 @@ rm -rf ${RPM_BUILD_ROOT}
/sbin/ldconfig
%changelog
* Sun Apr 7 2024 JiangShui Yang <yangjiangshui@h-partners.com> 2.6.0-3
- libwd: update the source code
* Thu Feb 22 2024 JiangShui Yang <yangjiangshui@h-partners.com> 2.6.0-2
- libwd: simplify warpdrive.spec