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Add new CPU model Cooperlake

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Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
This commit is contained in:
Jingyi Wang 2021-07-27 15:19:45 +08:00
parent 269ef91758
commit 909e0586cd
4 changed files with 335 additions and 1 deletions
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167
cpu_map-Add-Cooperlake-x86-CPU-model.patch Normal file
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@ -0,0 +1,167 @@
From 41717af8988db9c2d9d8b753f306f6deaa1cec8d Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Tue, 19 May 2020 15:08:11 +0200
Subject: [PATCH 2/3] cpu_map: Add Cooperlake x86 CPU model
The stepping range (10-11) is likely incomplete. QEMU uses 10 and the
CPUID data for Cooperlake show 11. We will update the range if needed
once more details about he CPU are available.
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
---
src/cpu_map/index.xml | 1 +
src/cpu_map/x86_Cooperlake.xml | 89 +++++++++++++++++++
.../domaincapsdata/qemu_5.0.0-q35.x86_64.xml | 1 +
.../domaincapsdata/qemu_5.0.0-tcg.x86_64.xml | 1 +
tests/domaincapsdata/qemu_5.0.0.x86_64.xml | 1 +
5 files changed, 93 insertions(+)
create mode 100644 src/cpu_map/x86_Cooperlake.xml
diff --git a/src/cpu_map/index.xml b/src/cpu_map/index.xml
index 672d0a3c92..3ccc76b9ed 100644
--- a/src/cpu_map/index.xml
+++ b/src/cpu_map/index.xml
@@ -54,6 +54,7 @@
<include filename="x86_Icelake-Client-noTSX.xml"/>
<include filename="x86_Icelake-Server.xml"/>
<include filename="x86_Icelake-Server-noTSX.xml"/>
+ <include filename="x86_Cooperlake.xml"/>
<!-- AMD CPUs -->
<include filename="x86_athlon.xml"/>
diff --git a/src/cpu_map/x86_Cooperlake.xml b/src/cpu_map/x86_Cooperlake.xml
new file mode 100644
index 0000000000..77e695aea4
--- /dev/null
+++ b/src/cpu_map/x86_Cooperlake.xml
@@ -0,0 +1,89 @@
+<cpus>
+ <model name='Cooperlake'>
+ <decode host='on' guest='on'/>
+ <vendor name='Intel'/>
+ <feature name="3dnowprefetch"/>
+ <feature name="abm"/>
+ <feature name="adx"/>
+ <feature name="aes"/>
+ <feature name="apic"/>
+ <feature name="arat"/>
+ <feature name="arch-capabilities"/>
+ <feature name="avx"/>
+ <feature name="avx2"/>
+ <feature name="avx512-bf16"/>
+ <feature name="avx512bw"/>
+ <feature name="avx512cd"/>
+ <feature name="avx512dq"/>
+ <feature name="avx512f"/>
+ <feature name="avx512vl"/>
+ <feature name="avx512vnni"/>
+ <feature name="bmi1"/>
+ <feature name="bmi2"/>
+ <feature name="clflush"/>
+ <feature name="clflushopt"/>
+ <feature name="clwb"/>
+ <feature name="cmov"/>
+ <feature name="cx16"/>
+ <feature name="cx8"/>
+ <feature name="de"/>
+ <feature name="erms"/>
+ <feature name="f16c"/>
+ <feature name="fma"/>
+ <feature name="fpu"/>
+ <feature name="fsgsbase"/>
+ <feature name="fxsr"/>
+ <feature name="hle"/>
+ <feature name="ibrs-all"/>
+ <feature name="invpcid"/>
+ <feature name="lahf_lm"/>
+ <feature name="lm"/>
+ <feature name="mca"/>
+ <feature name="mce"/>
+ <feature name="mds-no"/>
+ <feature name="mmx"/>
+ <feature name="movbe"/>
+ <feature name="msr"/>
+ <feature name="mtrr"/>
+ <feature name="nx"/>
+ <feature name="pae"/>
+ <feature name="pat"/>
+ <feature name="pcid"/>
+ <feature name="pclmuldq"/>
+ <feature name="pdpe1gb"/>
+ <feature name="pge"/>
+ <feature name="pku"/>
+ <feature name="pni"/>
+ <feature name="popcnt"/>
+ <feature name="pschange-mc-no"/>
+ <feature name="pse"/>
+ <feature name="pse36"/>
+ <feature name="rdctl-no"/>
+ <feature name="rdrand"/>
+ <feature name="rdseed"/>
+ <feature name="rdtscp"/>
+ <feature name="rtm"/>
+ <feature name="sep"/>
+ <feature name="skip-l1dfl-vmentry"/>
+ <feature name="smap"/>
+ <feature name="smep"/>
+ <feature name="spec-ctrl"/>
+ <feature name="ssbd"/>
+ <feature name="sse"/>
+ <feature name="sse2"/>
+ <feature name="sse4.1"/>
+ <feature name="sse4.2"/>
+ <feature name="ssse3"/>
+ <feature name="stibp"/>
+ <feature name="syscall"/>
+ <feature name="taa-no"/>
+ <feature name="tsc"/>
+ <feature name="tsc-deadline"/>
+ <feature name="vme"/>
+ <feature name="x2apic"/>
+ <feature name="xgetbv1"/>
+ <feature name="xsave"/>
+ <feature name="xsavec"/>
+ <feature name="xsaveopt"/>
+ </model>
+</cpus>
diff --git a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
index ff721530cd..fa945fc002 100644
--- a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
@@ -93,6 +93,7 @@
<model usable='no'>EPYC-IBPB</model>
<model usable='no'>EPYC</model>
<model usable='no'>Dhyana</model>
+ <model usable='no'>Cooperlake</model>
<model usable='yes'>Conroe</model>
<model usable='no'>Cascadelake-Server-noTSX</model>
<model usable='no'>Cascadelake-Server</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
index d567863f49..a0eeed7c2d 100644
--- a/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-tcg.x86_64.xml
@@ -101,6 +101,7 @@
<model usable='no'>EPYC-IBPB</model>
<model usable='no'>EPYC</model>
<model usable='no'>Dhyana</model>
+ <model usable='no'>Cooperlake</model>
<model usable='yes'>Conroe</model>
<model usable='no'>Cascadelake-Server-noTSX</model>
<model usable='no'>Cascadelake-Server</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
index 2c6066003d..fbde7a6ba2 100644
--- a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
@@ -92,6 +92,7 @@
<model usable='no'>EPYC-IBPB</model>
<model usable='no'>EPYC</model>
<model usable='no'>Dhyana</model>
+ <model usable='no'>Cooperlake</model>
<model usable='yes'>Conroe</model>
<model usable='no'>Cascadelake-Server-noTSX</model>
<model usable='no'>Cascadelake-Server</model>
--
2.27.0

131
cpu_map-Add-pschange-mc-no-bit-in-IA32_ARCH_CAPABILI.patch Normal file
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@ -0,0 +1,131 @@
From 9696e88e150fce9ea82eadb16726c8c3a7a197ae Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Mon, 18 May 2020 20:55:42 +0200
Subject: [PATCH 1/3] cpu_map: Add pschange-mc-no bit in IA32_ARCH_CAPABILITIES
MSR
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
---
src/cpu_map/x86_features.xml | 3 +++
tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml | 2 +-
tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml | 1 +
tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml | 1 +
tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml | 1 +
tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml | 1 +
tests/domaincapsdata/qemu_4.2.0.x86_64.xml | 1 +
tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml | 1 +
tests/domaincapsdata/qemu_5.0.0.x86_64.xml | 1 +
9 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
index 2c4c29dc99..8525ae0fa5 100644
--- a/src/cpu_map/x86_features.xml
+++ b/src/cpu_map/x86_features.xml
@@ -509,6 +509,9 @@
<feature name='mds-no'>
<msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
</feature>
+ <feature name='pschange-mc-no'>
+ <msr index='0x10a' edx='0x00000000' eax='0x00000040'/>
+ </feature>
<feature name='tsx-ctrl'>
<msr index='0x10a' edx='0x00000000' eax='0x00000080'/>
</feature>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
index 6c480eeacf..57f8ebabba 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-enabled.xml
@@ -5,5 +5,5 @@
<cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x009c47ab' ecx='0x00000004' edx='0xac000400'/>
<cpuid eax_in='0x0000000d' ecx_in='0x01' eax='0x0000000f' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
<cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000121' edx='0x2c100800'/>
- <msr index='0x10a' edx='0x00000000' eax='0x00000008'/>
+ <msr index='0x10a' edx='0x00000000' eax='0x00000048'/>
</cpudata>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
index 92404e4d03..ed06515e99 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-guest.xml
@@ -26,6 +26,7 @@
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
<feature policy='disable' name='hle'/>
<feature policy='disable' name='rtm'/>
</cpu>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
index 7f6fe2eac3..7681c94649 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-host.xml
@@ -27,4 +27,5 @@
<feature name='pdpe1gb'/>
<feature name='invtsc'/>
<feature name='skip-l1dfl-vmentry'/>
+ <feature name='pschange-mc-no'/>
</cpu>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
index 645c0934c2..4774d39c7e 100644
--- a/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
+++ b/tests/cputestdata/x86_64-cpuid-Core-i7-8550U-json.xml
@@ -14,6 +14,7 @@
<feature policy='require' name='xsaves'/>
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
<feature policy='disable' name='hle'/>
<feature policy='disable' name='rtm'/>
</cpu>
diff --git a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml
index 1b8b8be2f5..fcb0505da0 100644
--- a/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_4.2.0-q35.x86_64.xml
@@ -47,6 +47,7 @@
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
</mode>
<mode name='custom' supported='yes'>
<model usable='yes'>qemu64</model>
diff --git a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml
index 213dcc5a08..e22ef8e032 100644
--- a/tests/domaincapsdata/qemu_4.2.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_4.2.0.x86_64.xml
@@ -46,6 +46,7 @@
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
</mode>
<mode name='custom' supported='yes'>
<model usable='yes'>qemu64</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
index 45c3e00b1e..ff721530cd 100644
--- a/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0-q35.x86_64.xml
@@ -47,6 +47,7 @@
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
</mode>
<mode name='custom' supported='yes'>
<model usable='yes'>qemu64</model>
diff --git a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
index d2a884eed1..2c6066003d 100644
--- a/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
+++ b/tests/domaincapsdata/qemu_5.0.0.x86_64.xml
@@ -46,6 +46,7 @@
<feature policy='require' name='pdpe1gb'/>
<feature policy='require' name='invtsc'/>
<feature policy='require' name='skip-l1dfl-vmentry'/>
+ <feature policy='require' name='pschange-mc-no'/>
</mode>
<mode name='custom' supported='yes'>
<model usable='yes'>qemu64</model>
--
2.27.0

30
cpu_map-Distribute-x86_Cooperlake.xml.patch Normal file
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@ -0,0 +1,30 @@
From fc20e12b3be7a4c96ff0a71112d69181408506d1 Mon Sep 17 00:00:00 2001
From: Jiri Denemark <jdenemar@redhat.com>
Date: Tue, 26 May 2020 12:52:00 +0200
Subject: [PATCH 3/3] cpu_map: Distribute x86_Cooperlake.xml
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Jingyi Wang <wangjingyi11@huawei.com>
---
src/cpu_map/Makefile.inc.am | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/cpu_map/Makefile.inc.am b/src/cpu_map/Makefile.inc.am
index ab5268d94f..8eb818706a 100644
--- a/src/cpu_map/Makefile.inc.am
+++ b/src/cpu_map/Makefile.inc.am
@@ -22,6 +22,7 @@ cpumap_DATA = \
cpu_map/x86_Cascadelake-Server.xml \
cpu_map/x86_Cascadelake-Server-noTSX.xml \
cpu_map/x86_Conroe.xml \
+ cpu_map/x86_Cooperlake.xml \
cpu_map/x86_core2duo.xml \
cpu_map/x86_coreduo.xml \
cpu_map/x86_cpu64-rhel5.xml \
--
2.27.0

8
libvirt.spec
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@ -105,7 +105,7 @@
Summary: Library providing a simple virtualization API
Name: libvirt
Version: 6.2.0
Release: 19
Release: 20
License: LGPLv2+
URL: https://libvirt.org/
@ -181,6 +181,9 @@ Patch0064: qemu-Support-retry-BLOCK_IO_ERROR-event.patch
Patch0065: add-phytium-2000plus-and-s2500-support-on-arm-archit.patch
Patch0066: libvirt-conf-Set-default-values-of-retry-fileds.patch
Patch0067: tests-fix-stat-mocking-with-Fedora-rawhide.patch
Patch0068: cpu_map-Add-Cooperlake-x86-CPU-model.patch
Patch0069: cpu_map-Add-pschange-mc-no-bit-in-IA32_ARCH_CAPABILI.patch
Patch0070: cpu_map-Distribute-x86_Cooperlake.xml.patch
Requires: libvirt-daemon = %{version}-%{release}
Requires: libvirt-daemon-config-network = %{version}-%{release}
@ -1915,6 +1918,9 @@ exit 0
%changelog
* Tue Jul 27 2021 Jingyi Wang <wangjingyi11@huawei.com>
- add new CPU model Cooperlake
* Tue Jul 13 2021 imxcc <xingchaochao@huawei.com>
- tests: fix stat mocking with Fedora rawhide