38 lines
1.2 KiB
Diff
38 lines
1.2 KiB
Diff
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From 3b401713bcd5acfd1030425832becad34a7eaac8 Mon Sep 17 00:00:00 2001
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From: Jiri Denemark <jdenemar@redhat.com>
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Date: Thu, 12 Dec 2019 15:12:05 +0100
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Subject: [PATCH 1/2] cpu_map: Add TAA_NO bit for IA32_ARCH_CAPABILITIES MSR
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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CVE-2019-11135
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CPUs with TAA_NO bit of IA32_ARCH_CAPABILITIES MSR set to 1 are not
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vulnerable to TSX Asynchronous Abort and passing this bit to a guest
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may avoid unnecessary mitigations.
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Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
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Reviewed-by: Ján Tomko <jtomko@redhat.com>
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(cherry-picked from commit 07aaced4e6ea6db8b27f44636f51cafa6f1847a8)
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Signed-off-by: Xu Yandong <xuyandong2@huawei.com>
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---
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src/cpu_map/x86_features.xml | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/src/cpu_map/x86_features.xml b/src/cpu_map/x86_features.xml
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index 2bed1e0..d1180ed 100644
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--- a/src/cpu_map/x86_features.xml
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+++ b/src/cpu_map/x86_features.xml
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@@ -502,4 +502,7 @@
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<feature name='mds-no'>
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<msr index='0x10a' edx='0x00000000' eax='0x00000020'/>
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</feature>
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+ <feature name='taa-no'>
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+ <msr index='0x10a' edx='0x00000000' eax='0x00000100'/>
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+ </feature>
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</cpus>
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--
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2.21.0
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