libatomic_ops/0001-add-sw_64-support.patch
2024-02-26 16:07:50 +08:00

131 lines
4.3 KiB
Diff

From 7473a08ba5d72c164dafd18f5d24204b650273dd Mon Sep 17 00:00:00 2001
From: li weigang <weigangli99@gmail.com>
Date: Wed, 1 Nov 2023 14:38:23 +0800
Subject: [PATCH] add sw_64 support
---
src/Makefile.am | 1 +
src/atomic_ops.h | 2 +
src/atomic_ops/sysdeps/gcc/sw_64.h | 70 ++++++++++++++++++++++++++++++
src/atomic_ops_stack.c | 2 +-
4 files changed, 74 insertions(+), 1 deletion(-)
create mode 100644 src/atomic_ops/sysdeps/gcc/sw_64.h
diff --git a/src/Makefile.am b/src/Makefile.am
index e71b67c..334d497 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -85,6 +85,7 @@ nobase_private_HEADERS = atomic_ops/ao_version.h \
\
atomic_ops/sysdeps/gcc/aarch64.h \
atomic_ops/sysdeps/gcc/alpha.h \
+ atomic_ops/sysdeps/gcc/sw_64.h \
atomic_ops/sysdeps/gcc/arm.h \
atomic_ops/sysdeps/gcc/avr32.h \
atomic_ops/sysdeps/gcc/cris.h \
diff --git a/src/atomic_ops.h b/src/atomic_ops.h
index b341e53..edba1c2 100644
--- a/src/atomic_ops.h
+++ b/src/atomic_ops.h
@@ -348,6 +348,8 @@
# elif defined(__hppa__)
# include "atomic_ops/sysdeps/gcc/hppa.h"
# define AO_CAN_EMUL_CAS
+# elif defined(__sw_64__)
+# include "atomic_ops/sysdeps/gcc/sw_64.h"
# elif defined(__alpha__)
# include "atomic_ops/sysdeps/gcc/alpha.h"
# define AO_GENERALIZE_TWICE
diff --git a/src/atomic_ops/sysdeps/gcc/sw_64.h b/src/atomic_ops/sysdeps/gcc/sw_64.h
new file mode 100644
index 0000000..fd196cf
--- /dev/null
+++ b/src/atomic_ops/sysdeps/gcc/sw_64.h
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 1991-1994 by Xerox Corporation. All rights reserved.
+ * Copyright (c) 1996-1999 by Silicon Graphics. All rights reserved.
+ * Copyright (c) 1999-2003 by Hewlett-Packard Company. All rights reserved.
+ *
+ *
+ * THIS MATERIAL IS PROVIDED AS IS, WITH ABSOLUTELY NO WARRANTY EXPRESSED
+ * OR IMPLIED. ANY USE IS AT YOUR OWN RISK.
+ *
+ * Permission is hereby granted to use or copy this program
+ * for any purpose, provided the above notices are retained on all copies.
+ * Permission to modify the code and to distribute modified code is granted,
+ * provided the above notices are retained, and a notice that the code was
+ * modified is included with the above copyright notice.
+ *
+ */
+
+#include "../loadstore/atomic_load.h"
+#include "../loadstore/atomic_store.h"
+
+#include "../test_and_set_t_is_ao_t.h"
+
+#define AO_NO_DD_ORDERING
+ /* Data dependence does not imply read ordering. */
+
+AO_INLINE void
+AO_nop_full(void)
+{
+ __asm__ __volatile__("memb" : : : "memory");
+}
+#define AO_HAVE_nop_full
+
+AO_INLINE void
+AO_nop_write(void)
+{
+ __asm__ __volatile__("memb" : : : "memory");
+}
+#define AO_HAVE_nop_write
+
+/* mb should be used for AO_nop_read(). That's the default. */
+
+/* TODO: implement AO_fetch_and_add explicitly. */
+
+/* We believe that ldq_l ... stq_c does not imply any memory barrier. */
+AO_INLINE int
+AO_compare_and_swap(volatile AO_t *addr,
+ AO_t old, AO_t new_val)
+{
+ unsigned long was_equal;
+ unsigned long temp;
+
+ __asm__ __volatile__(
+ " ldi %3,%1\n"
+ "1: lldl %0,0(%3)\n"
+ " cmpeq %0,%5,%2\n"
+ " wr_f %2\n"
+ " mov %4,%0\n"
+ " lstl %0,0(%3)\n"
+ " rd_f %0\n"
+ " beq %2,2f\n"
+ " beq %0,1b\n"
+ "2:\n"
+ : "=&r" (temp), "+m" (*addr), "=&r" (was_equal),"=&r"(temp)
+ : "r" (new_val), "Ir" (old)
+ :"memory");
+ return (int)was_equal;
+}
+#define AO_HAVE_compare_and_swap
+
+/* TODO: implement AO_fetch_compare_and_swap */
diff --git a/src/atomic_ops_stack.c b/src/atomic_ops_stack.c
index ec8ace4..03638be 100644
--- a/src/atomic_ops_stack.c
+++ b/src/atomic_ops_stack.c
@@ -81,7 +81,7 @@ AO_API AO_uintptr_t *AO_stack_next_ptr(AO_uintptr_t next)
} /* extern "C" */
# endif
-# if defined(__alpha__) && (__GNUC__ == 4)
+# if (defined(__alpha__) || defined(__sw_64__)) && (__GNUC__ == 4)
/* Workaround __builtin_expect bug found in */
/* gcc-4.6.3/alpha causing test_stack failure. */
# undef AO_EXPECT_FALSE
--
2.20.1