!23 Correct tsd layout graph

From: @meng-wenhua 
Reviewed-by: @Charlie_li 
Signed-off-by: @Charlie_li

backport-0001-Correct-tsd-layout-graph.patch

@@ -0,0 +1,51 @@
+From 56c8ecffc1f84f630e10f775bc29fcf4c743a3c9 Mon Sep 17 00:00:00 2001
+From: Yinan Zhang <zyn8950@gmail.com>
+Date: Thu, 6 Jun 2019 09:22:10 -0700
+Subject: [PATCH] Correct tsd layout graph
+
+Augmented the tsd layout graph so that the two recently added fields,
+`offset_state` and `bytes_until_sample`, are properly reflected.
+As is shown, the cache footprint is 16 bytes larger than before.
+---
+ include/jemalloc/internal/tsd.h | 8 ++++++--
+ 1 file changed, 6 insertions(+), 2 deletions(-)
+
+diff --git a/include/jemalloc/internal/tsd.h b/include/jemalloc/internal/tsd.h
+index 9ba26004..18b2476b 100644
+--- a/include/jemalloc/internal/tsd.h
++++ b/include/jemalloc/internal/tsd.h
+@@ -20,6 +20,7 @@
+  * e: tcache_enabled
+  * m: thread_allocated (config_stats)
+  * f: thread_deallocated (config_stats)
++ * b: bytes_until_sample (config_prof)
+  * p: prof_tdata (config_prof)
+  * c: rtree_ctx (rtree cache accessed on deallocation)
+  * t: tcache
+@@ -27,6 +28,7 @@
+  * d: arenas_tdata_bypass
+  * r: reentrancy_level
+  * x: narenas_tdata
++ * v: offset_state
+  * i: iarena
+  * a: arena
+  * o: arenas_tdata
+@@ -35,11 +37,13 @@
+  * Use a compact layout to reduce cache footprint.
+  * +--- 64-bit and 64B cacheline; 1B each letter; First byte on the left. ---+
+  * |----------------------------  1st cacheline  ----------------------------|
+- * | sedrxxxx mmmmmmmm ffffffff pppppppp [c * 32  ........ ........ .......] |
++ * | sedrxxxx vvvvvvvv mmmmmmmm ffffffff bbbbbbbb pppppppp [c * 16  .......] |
+  * |----------------------------  2nd cacheline  ----------------------------|
+  * | [c * 64  ........ ........ ........ ........ ........ ........ .......] |
+  * |----------------------------  3nd cacheline  ----------------------------|
+- * | [c * 32  ........ ........ .......] iiiiiiii aaaaaaaa oooooooo [t...... |
++ * | [c * 48  ........ ........ ........ ........ .......] iiiiiiii aaaaaaaa |
++ * +----------------------------  4th cacheline  ----------------------------+
++ * | oooooooo [t...... ........ ........ ........ ........ ........ ........ |
+  * +-------------------------------------------------------------------------+
+  * Note: the entire tcache is embedded into TSD and spans multiple cachelines.
+  *
+-- 
+2.37.3.windows.1
+

jemalloc.spec

@@ -12,7 +12,7 @@
 
 Name:           jemalloc
 Version:        5.2.1
-Release:        7
+Release:        8
 Summary:        General-purpose scalable concurrent malloc implementation
 License:        BSD-2-Clause
 URL:            http://www.canonware.com/jemalloc/
@@ -22,6 +22,9 @@ Patch1:         backport-Jemalloc-5.2.1-patch-1-fix-large-bin-index-accessed-thr
 Patch2:         backport-Jemalloc-5.2.1-patch-2-fix-undefined-behavior-in-hash.patch
 Patch3:         backport-Jemalloc-5.2.1-patch-3-fix-tcaches-mutex-pre-post-fork-handling.patch
 Patch4:         0001-jemalloc-5.2.1-add-loongarch-support.patch
+
+Patch6000:      backport-0001-Correct-tsd-layout-graph.patch
+
 BuildRequires:  libxslt perl-generators gcc
 
 %description
@@ -48,6 +51,7 @@ The help package contains manual pages and other related files for jemalloc.
 %ifarch loongarch64
 %patch4 -p1
 %endif
+%patch6000 -p1
 
 %build
 export LDFLAGS="%{?__global_ldflags} -lrt"
@@ -89,6 +93,9 @@ make check
 %{_mandir}/man3/jemalloc.3*
 
 %changelog
+* Mon Jan 9 2023 mengwenhua <mengwenhua@xfusion.com> - 5.2.1-8
+- Correct tsd layout graph
+
 * Tue Nov 15 2022 doupengda <doupengda@loongson.cn> - 5.2.1-7
 - add loongarch64 support