From 1d87ab186cd328420e27fc231a25858fca5e546e Mon Sep 17 00:00:00 2001
From: Xing Li <lixing@loongson.cn>
Date: Fri, 25 Oct 2024 07:31:30 +0000
Subject: [PATCH 15/15] LoongArch: Change tunable for 2.38

---
 sysdeps/loongarch/cpu-tunables.c | 54 ++++++++++++++++++++++----------
 1 file changed, 37 insertions(+), 17 deletions(-)

diff --git a/sysdeps/loongarch/cpu-tunables.c b/sysdeps/loongarch/cpu-tunables.c
index e274e993..3b341a0d 100644
--- a/sysdeps/loongarch/cpu-tunables.c
+++ b/sysdeps/loongarch/cpu-tunables.c
@@ -24,14 +24,12 @@
 #include <cpu-features.h>
 #include <ldsodefs.h>
 #include <sys/auxv.h>
-#include <dl-tunables-parse.h>
-#include <dl-symbol-redir-ifunc.h>
 
-#define CHECK_GLIBC_IFUNC_CPU(f, name, len)			\
+#define CHECK_GLIBC_IFUNC_CPU(f, name, disable, len)			\
   _Static_assert (sizeof (#name) - 1 == len, #name " != " #len);	\
-  if (tunable_str_comma_strcmp_cte (&f, #name))				\
+  if (!memcmp(f, #name, len))				\
     {									\
-      if (f.disable)							\
+      if (disable)							\
 	GLRO(dl_larch_cpu_features).hwcap &= (~HWCAP_LOONGARCH_##name);	\
       else								\
 	GLRO(dl_larch_cpu_features).hwcap |= HWCAP_LOONGARCH_##name;	\
@@ -58,29 +56,51 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
      NOTE: the IFUNC selection may change over time.  Please check all
      multiarch implementations when experimenting.  */
 
-  struct tunable_str_comma_state_t ts;
-  tunable_str_comma_init (&ts, valp);
+  const char *p = valp->strval, *c;
+  size_t len;
 
-  struct tunable_str_comma_t n;
-  while (tunable_str_comma_next (&ts, &n))
+  do
     {
-      switch (n.len)
+      const char *n;
+      bool disable;
+      size_t nl;
+
+      for (c = p; *c != ','; c++)
+	if (*c == '\0')
+	  break;
+
+      len = c - p;
+      disable = *p == '-';
+      if (disable)
+	{
+	  n = p + 1;
+	  nl = len - 1;
+	}
+      else
+	{
+	  n = p;
+	  nl = len;
+	}
+      switch (nl)
 	{
 	default:
 	  break;
 	case 3:
-	  {
-	    CHECK_GLIBC_IFUNC_CPU (n, LSX, 3);
-	    CHECK_GLIBC_IFUNC_CPU (n, UAL, 3);
-	  }
+	    {
+	      CHECK_GLIBC_IFUNC_CPU (n, LSX, disable, 3);
+	      CHECK_GLIBC_IFUNC_CPU (n, UAL, disable, 3);
+	    }
 	  break;
 	case 4:
-	  {
-	    CHECK_GLIBC_IFUNC_CPU (n, LASX, 4);
-	  }
+	    {
+	      CHECK_GLIBC_IFUNC_CPU (n, LASX, disable, 4);
+	    }
 	  break;
 	}
+      p += len + 1;
     }
+  while (*c != '\0');
+
 
   /* Ensure that the user has not enabled any unsupported features.  */
   GLRO(dl_larch_cpu_features).hwcap &= GLRO(dl_hwcap);
-- 
2.45.2