01e0ec8ea6
- avoid-cycling-on-vertain-subreg-reloads.patch: Add patch source comment - change-gcc-BASE-VER.patch: Likewise - dont-generate-IF_THEN_ELSE.patch: Likewise - fix-ICE-in-compute_live_loop_exits.patch: Likewise - fix-ICE-in-eliminate_stmt.patch: Likewise - fix-ICE-in-vect_create_epilog_for_reduction.patch: Likewise - fix-ICE-in-vect_stmt_to_vectorize.patch: Likewise - fix-ICE-in-verify_ssa.patch: Likewise - fix-ICE-when-vectorizing-nested-cycles.patch: Likewise - fix-cost-of-plus.patch: Likewise - ipa-const-prop-self-recursion-bugfix.patch: Likewise - simplify-removing-subregs.patch: Likewise - medium-code-mode.patch: Bugfix - fix-when-peeling-for-alignment.patch: Move to ... - fix-PR-92351-When-peeling-for-alignment.patch: ... this - AArch64-Fix-constraints-for-CPY-M.patch: New file - Apply-maximum-nunits-for-BB-SLP.patch: New file - Fix-EXTRACT_LAST_REDUCTION-segfault.patch: New file - Fix-up-push_partial_def-little-endian-bitfield.patch: New file - Fix-zero-masking-for-vcvtps2ph.patch: New file - IRA-Handle-fully-tied-destinations.patch: New file - SLP-VECT-Add-check-to-fix-96837.patch: New file - aarch64-Fix-ash-lr-lshr-mode-3-expanders.patch: New file - aarch64-Fix-bf16-and-matrix-g++-gfortran.patch: New file - aarch64-Fix-mismatched-SVE-predicate-modes.patch: New file - aarch64-fix-sve-acle-error.patch: New file - adjust-vector-cost-and-move-EXTRACT_LAST_REDUCTION-costing.patch: New file - bf16-and-matrix-characteristic.patch: New file - fix-ICE-IPA-compare-VRP-types.patch: New file - fix-ICE-in-affine-combination.patch: New file - fix-ICE-in-pass-vect.patch: New file - fix-ICE-in-vect_update_misalignment_for_peel.patch: New file - fix-addlosymdi-ICE-in-pass-reload.patch: New file - fix-an-ICE-in-vect_recog_mask_conversion_pattern.patch: New file - fix-avx512vl-vcvttpd2dq-2-fail.patch: New file - fix-issue499-add-nop-convert.patch: New file - fix-issue604-ldist-dependency-fixup.patch: New file - modulo-sched-Carefully-process-loop-counter-initiali.patch: New file - re-PR-target-91124-gcc.target-i386-avx512vl-vpshldvd.patch: New file - reduction-paths-with-unhandled-live-stmt.patch: New file - redundant-loop-elimination.patch: New file - sccvn-Improve-handling-of-load-masked-with-integer.patch: New file - speed-up-DDG-analysis-and-fix-bootstrap-compare-debug.patch: New file - store-merging-Consider-also-overlapping-stores-earlier.patch: New file - tree-optimization-96920-another-ICE-when-vectorizing.patch: New file - tree-optimization-97812-fix-range-query-in-VRP-asser.patch: New file - vectorizable-comparison-Swap-operands-only-once.patch: New file - x86-Fix-bf16-and-matrix.patch: New file
140 lines
5.1 KiB
Diff
140 lines
5.1 KiB
Diff
This backport contains 1 patch from gcc main stream tree.
|
|
The commit id of these patchs list as following in the order of time.
|
|
|
|
0001-Fix-zero-masking-for-vcvtps2ph-when-dest-operand-is-.patch
|
|
43088bb4dadd3d14b6b594c5f9363fe879f3d7f7
|
|
|
|
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
|
|
index 87354451c58..7815d77bcbf 100644
|
|
--- a/gcc/config/i386/sse.md
|
|
+++ b/gcc/config/i386/sse.md
|
|
@@ -21775,19 +21775,19 @@
|
|
(set_attr "prefix" "maybe_evex")
|
|
(set_attr "mode" "V4SF")])
|
|
|
|
-(define_insn "*vcvtps2ph_store<mask_name>"
|
|
+(define_insn "*vcvtps2ph_store<merge_mask_name>"
|
|
[(set (match_operand:V4HI 0 "memory_operand" "=m")
|
|
(unspec:V4HI [(match_operand:V4SF 1 "register_operand" "v")
|
|
(match_operand:SI 2 "const_0_to_255_operand" "N")]
|
|
UNSPEC_VCVTPS2PH))]
|
|
"TARGET_F16C || TARGET_AVX512VL"
|
|
- "vcvtps2ph\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2}"
|
|
+ "vcvtps2ph\t{%2, %1, %0<merge_mask_operand3>|%0<merge_mask_operand3>, %1, %2}"
|
|
[(set_attr "type" "ssecvt")
|
|
(set_attr "prefix" "maybe_evex")
|
|
(set_attr "mode" "V4SF")])
|
|
|
|
(define_insn "vcvtps2ph256<mask_name>"
|
|
- [(set (match_operand:V8HI 0 "nonimmediate_operand" "=vm")
|
|
+ [(set (match_operand:V8HI 0 "register_operand" "=v")
|
|
(unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v")
|
|
(match_operand:SI 2 "const_0_to_255_operand" "N")]
|
|
UNSPEC_VCVTPS2PH))]
|
|
@@ -21798,8 +21798,20 @@
|
|
(set_attr "btver2_decode" "vector")
|
|
(set_attr "mode" "V8SF")])
|
|
|
|
+(define_insn "*vcvtps2ph256<merge_mask_name>"
|
|
+ [(set (match_operand:V8HI 0 "memory_operand" "=m")
|
|
+ (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v")
|
|
+ (match_operand:SI 2 "const_0_to_255_operand" "N")]
|
|
+ UNSPEC_VCVTPS2PH))]
|
|
+ "TARGET_F16C || TARGET_AVX512VL"
|
|
+ "vcvtps2ph\t{%2, %1, %0<merge_mask_operand3>|%0<merge_mask_operand3>, %1, %2}"
|
|
+ [(set_attr "type" "ssecvt")
|
|
+ (set_attr "prefix" "maybe_evex")
|
|
+ (set_attr "btver2_decode" "vector")
|
|
+ (set_attr "mode" "V8SF")])
|
|
+
|
|
(define_insn "<mask_codefor>avx512f_vcvtps2ph512<mask_name>"
|
|
- [(set (match_operand:V16HI 0 "nonimmediate_operand" "=vm")
|
|
+ [(set (match_operand:V16HI 0 "register_operand" "=v")
|
|
(unspec:V16HI
|
|
[(match_operand:V16SF 1 "register_operand" "v")
|
|
(match_operand:SI 2 "const_0_to_255_operand" "N")]
|
|
@@ -21810,6 +21822,18 @@
|
|
(set_attr "prefix" "evex")
|
|
(set_attr "mode" "V16SF")])
|
|
|
|
+(define_insn "*avx512f_vcvtps2ph512<merge_mask_name>"
|
|
+ [(set (match_operand:V16HI 0 "memory_operand" "=m")
|
|
+ (unspec:V16HI
|
|
+ [(match_operand:V16SF 1 "register_operand" "v")
|
|
+ (match_operand:SI 2 "const_0_to_255_operand" "N")]
|
|
+ UNSPEC_VCVTPS2PH))]
|
|
+ "TARGET_AVX512F"
|
|
+ "vcvtps2ph\t{%2, %1, %0<merge_mask_operand3>|%0<merge_mask_operand3>, %1, %2}"
|
|
+ [(set_attr "type" "ssecvt")
|
|
+ (set_attr "prefix" "evex")
|
|
+ (set_attr "mode" "V16SF")])
|
|
+
|
|
;; For gather* insn patterns
|
|
(define_mode_iterator VEC_GATHER_MODE
|
|
[V2DI V2DF V4DI V4DF V4SI V4SF V8SI V8SF])
|
|
diff --git a/gcc/config/i386/subst.md b/gcc/config/i386/subst.md
|
|
index a5ca144c7f7..58ea9dc83e2 100644
|
|
--- a/gcc/config/i386/subst.md
|
|
+++ b/gcc/config/i386/subst.md
|
|
@@ -73,6 +73,18 @@
|
|
(match_operand:SUBST_V 2 "nonimm_or_0_operand" "0C")
|
|
(match_operand:<avx512fmaskmode> 3 "register_operand" "Yk")))])
|
|
|
|
+(define_subst_attr "merge_mask_name" "merge_mask" "" "_merge_mask")
|
|
+(define_subst_attr "merge_mask_operand3" "merge_mask" "" "%{%3%}")
|
|
+(define_subst "merge_mask"
|
|
+ [(set (match_operand:SUBST_V 0)
|
|
+ (match_operand:SUBST_V 1))]
|
|
+ "TARGET_AVX512F"
|
|
+ [(set (match_dup 0)
|
|
+ (vec_merge:SUBST_V
|
|
+ (match_dup 1)
|
|
+ (match_dup 0)
|
|
+ (match_operand:<avx512fmaskmode> 2 "register_operand" "Yk")))])
|
|
+
|
|
(define_subst_attr "mask_scalar_merge_name" "mask_scalar_merge" "" "_mask")
|
|
(define_subst_attr "mask_scalar_merge_operand3" "mask_scalar_merge" "" "%{%3%}")
|
|
(define_subst_attr "mask_scalar_merge_operand4" "mask_scalar_merge" "" "%{%4%}")
|
|
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-pr95254.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-pr95254.c
|
|
new file mode 100644
|
|
index 00000000000..9e0da947368
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtps2ph-pr95254.c
|
|
@@ -0,0 +1,12 @@
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-O2 -mavx512f" } */
|
|
+
|
|
+#include<immintrin.h>
|
|
+extern __m256i res;
|
|
+void
|
|
+foo (__m512 a, __mmask16 m)
|
|
+{
|
|
+ res = _mm512_maskz_cvtps_ph (m, a, 10);
|
|
+}
|
|
+
|
|
+/* { dg-final { scan-assembler-not "vcvtps2ph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]\[^\n\]*res\[^\n\]*\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"} } */
|
|
diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr95254.c b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr95254.c
|
|
new file mode 100644
|
|
index 00000000000..0c685ea66fd
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-pr95254.c
|
|
@@ -0,0 +1,18 @@
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-O2 -mavx512vl -mavx512f" } */
|
|
+
|
|
+#include<immintrin.h>
|
|
+extern __m128i res;
|
|
+void
|
|
+foo (__m256 a, __mmask8 m)
|
|
+{
|
|
+ res = _mm256_maskz_cvtps_ph (m, a, 10);
|
|
+}
|
|
+
|
|
+void
|
|
+foo1 (__m128 a, __mmask8 m)
|
|
+{
|
|
+ res = _mm_maskz_cvtps_ph (m, a, 10);
|
|
+}
|
|
+
|
|
+/* { dg-final { scan-assembler-not "vcvtps2ph\[ \\t\]+\[^\{\n\]*%\[xy\]mm\[0-9\]\[^\n\]*res\[^\n\]*\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)"} } */
|