118 lines
4.0 KiB
Diff
118 lines
4.0 KiB
Diff
diff -Nurp a/gcc/expr.c b/gcc/expr.c
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--- a/gcc/expr.c 2020-08-05 20:33:04.068000000 +0800
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+++ b/gcc/expr.c 2020-08-05 20:33:21.420000000 +0800
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@@ -3770,6 +3770,78 @@ emit_move_insn (rtx x, rtx y)
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gcc_assert (mode != BLKmode
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&& (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
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+ /* If we have a copy that looks like one of the following patterns:
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+ (set (subreg:M1 (reg:M2 ...)) (subreg:M1 (reg:M2 ...)))
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+ (set (subreg:M1 (reg:M2 ...)) (mem:M1 ADDR))
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+ (set (mem:M1 ADDR) (subreg:M1 (reg:M2 ...)))
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+ (set (subreg:M1 (reg:M2 ...)) (constant C))
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+ where mode M1 is equal in size to M2, try to detect whether the
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+ mode change involves an implicit round trip through memory.
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+ If so, see if we can avoid that by removing the subregs and
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+ doing the move in mode M2 instead. */
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+
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+ rtx x_inner = NULL_RTX;
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+ rtx y_inner = NULL_RTX;
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+
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+#define CANDIDATE_SUBREG_P(subreg) \
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+ (REG_P (SUBREG_REG (subreg)) \
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+ && known_eq (GET_MODE_SIZE (GET_MODE (SUBREG_REG (subreg))), \
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+ GET_MODE_SIZE (GET_MODE (subreg))) \
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+ && optab_handler (mov_optab, GET_MODE (SUBREG_REG (subreg))) \
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+ != CODE_FOR_nothing)
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+
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+#define CANDIDATE_MEM_P(innermode, mem) \
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+ (!targetm.can_change_mode_class ((innermode), GET_MODE (mem), ALL_REGS) \
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+ && !push_operand ((mem), GET_MODE (mem)) \
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+ /* Not a candiate if innermode requires too much alignment. */ \
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+ && (MEM_ALIGN (mem) >= GET_MODE_ALIGNMENT (innermode) \
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+ || targetm.slow_unaligned_access (GET_MODE (mem), \
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+ MEM_ALIGN (mem)) \
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+ || !targetm.slow_unaligned_access ((innermode), \
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+ MEM_ALIGN (mem))))
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+
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+ if (SUBREG_P (x) && CANDIDATE_SUBREG_P (x))
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+ x_inner = SUBREG_REG (x);
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+
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+ if (SUBREG_P (y) && CANDIDATE_SUBREG_P (y))
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+ y_inner = SUBREG_REG (y);
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+
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+ if (x_inner != NULL_RTX
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+ && y_inner != NULL_RTX
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+ && GET_MODE (x_inner) == GET_MODE (y_inner)
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+ && !targetm.can_change_mode_class (GET_MODE (x_inner), mode, ALL_REGS))
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+ {
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+ x = x_inner;
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+ y = y_inner;
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+ mode = GET_MODE (x_inner);
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+ }
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+ else if (x_inner != NULL_RTX
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+ && MEM_P (y)
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+ && CANDIDATE_MEM_P (GET_MODE (x_inner), y))
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+ {
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+ x = x_inner;
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+ y = adjust_address (y, GET_MODE (x_inner), 0);
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+ mode = GET_MODE (x_inner);
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+ }
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+ else if (y_inner != NULL_RTX
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+ && MEM_P (x)
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+ && CANDIDATE_MEM_P (GET_MODE (y_inner), x))
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+ {
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+ x = adjust_address (x, GET_MODE (y_inner), 0);
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+ y = y_inner;
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+ mode = GET_MODE (y_inner);
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+ }
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+ else if (x_inner != NULL_RTX
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+ && CONSTANT_P (y)
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+ && !targetm.can_change_mode_class (GET_MODE (x_inner),
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+ mode, ALL_REGS)
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+ && (y_inner = simplify_subreg (GET_MODE (x_inner), y, mode, 0)))
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+ {
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+ x = x_inner;
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+ y = y_inner;
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+ mode = GET_MODE (x_inner);
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+ }
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+
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if (CONSTANT_P (y))
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{
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if (optimize
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diff -Nurp a/gcc/testsuite/gcc.target/aarch64/pr95254.c b/gcc/testsuite/gcc.target/aarch64/pr95254.c
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--- a/gcc/testsuite/gcc.target/aarch64/pr95254.c 1970-01-01 08:00:00.000000000 +0800
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+++ b/gcc/testsuite/gcc.target/aarch64/pr95254.c 2020-08-05 20:33:21.424000000 +0800
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@@ -0,0 +1,19 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -ftree-slp-vectorize -march=armv8.2-a+sve -msve-vector-bits=256" } */
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+
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+typedef short __attribute__((vector_size (8))) v4hi;
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+
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+typedef union U4HI { v4hi v; short a[4]; } u4hi;
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+
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+short b[4];
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+
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+void pass_v4hi (v4hi v)
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+{
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+ int i;
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+ u4hi u;
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+ u.v = v;
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+ for (i = 0; i < 4; i++)
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+ b[i] = u.a[i];
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+};
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+
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+/* { dg-final { scan-assembler-not "ptrue" } } */
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diff -Nurp a/gcc/testsuite/gcc.target/i386/pr67609.c b/gcc/testsuite/gcc.target/i386/pr67609.c
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--- a/gcc/testsuite/gcc.target/i386/pr67609.c 2020-08-05 20:33:04.628000000 +0800
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+++ b/gcc/testsuite/gcc.target/i386/pr67609.c 2020-08-05 20:33:21.424000000 +0800
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@@ -1,7 +1,7 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -msse2" } */
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/* { dg-require-effective-target lp64 } */
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-/* { dg-final { scan-assembler "movdqa" } } */
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+/* { dg-final { scan-assembler "movq\t%xmm0" } } */
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#include <emmintrin.h>
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__m128d reg;
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