db8a90ff34
- Add add-checks-to-avoid-spoiling-if-conversion.patch - Add add-option-fallow-store-data-races.patch - Add complete-struct-reorg.patch - Add cse-in-vectorization.patch - Add enable-simd-math.patch - Add fix-ICE-avoid-issueing-loads-in-SM-when-possible.patch - Add fix-ICE-in-compute_live_loop_exits.patch - Add fix-ICE-in-copy_reference_ops_from_ref.patch - Add fix-ICE-in-declare-return-variable.patch - Add fix-ICE-in-exact_div.patch - Add fix-ICE-in-gimple_op.patch - Add fix-ICE-in-model_update_limit_points_in_group.patch - Add fix-ICE-in-reload.patch - Add fix-ICE-in-store_constructor.patch - Add fix-ICE-in-vec.patch - Add fix-ICE-in-vect_create_epilog_for_reduction.patch - Add fix-ICE-in-vect_create_epilog_for_reduction_2.patch - Add fix-ICE-in-vect_create_epilog_for_reduction_3.patch - Add fix-ICE-in-vect_get_vec_def_for_stmt_copy.patch - Add fix-ICE-in-vect_slp_analyze_node_operations.patch - Add fix-ICE-in-vect_stmt_to_vectorize.patch - Add fix-ICE-in-vect_transform_stmt.patch - Add fix-ICE-in-vectorizable_condition.patch - Add fix-ICE-in-verify_ssa.patch - Add fix-ICE-statement-uses-released-SSA-name.patch - Add fix-ICE-when-vectorizing-nested-cycles.patch - Add fix-SSA-update-for-vectorizer-epilogue.patch - Add fix-do-not-build-op.patch - Add fix-load-eliding-in-SM.patch - Add fix-wrong-vectorizer-code.patch - Add generate-csel-for-arrayref.patch - Add ipa-const-prop-self-recursion-bugfix.patch - Add ipa-const-prop.patch - Add ipa-struct-reorg-bugfix.patch - Add ipa-struct-reorg.patch - Add medium-code-mode.patch - Add reduction-chain-slp-option.patch - Add reductions-slp-enhancement.patch - Add simplify-removing-subregs.patch - Add tighten-range-for-generating-csel.patch - Add vectorization-enhancement.patch - Add add-checks-to-avoid-spoiling-if-conversion.patch - Add add-option-fallow-store-data-races.patch - Add complete-struct-reorg.patch - Add cse-in-vectorization.patch - Add enable-simd-math.patch - Add fix-ICE-avoid-issueing-loads-in-SM-when-possible.patch - Add fix-ICE-in-compute_live_loop_exits.patch - Add fix-ICE-in-copy_reference_ops_from_ref.patch - Add fix-ICE-in-declare-return-variable.patch - Add fix-ICE-in-exact_div.patch - Add fix-ICE-in-gimple_op.patch - Add fix-ICE-in-model_update_limit_points_in_group.patch - Add fix-ICE-in-reload.patch - Add fix-ICE-in-store_constructor.patch - Add fix-ICE-in-vec.patch - Add fix-ICE-in-vect_create_epilog_for_reduction.patch - Add fix-ICE-in-vect_create_epilog_for_reduction_2.patch - Add fix-ICE-in-vect_create_epilog_for_reduction_3.patch - Add fix-ICE-in-vect_get_vec_def_for_stmt_copy.patch - Add fix-ICE-in-vect_slp_analyze_node_operations.patch - Add fix-ICE-in-vect_stmt_to_vectorize.patch - Add fix-ICE-in-vect_transform_stmt.patch - Add fix-ICE-in-vectorizable_condition.patch - Add fix-ICE-in-verify_ssa.patch - Add fix-ICE-statement-uses-released-SSA-name.patch - Add fix-ICE-when-vectorizing-nested-cycles.patch - Add fix-SSA-update-for-vectorizer-epilogue.patch - Add fix-do-not-build-op.patch - Add fix-load-eliding-in-SM.patch - Add fix-wrong-vectorizer-code.patch - Add generate-csel-for-arrayref.patch - Add ipa-const-prop-self-recursion-bugfix.patch - Add ipa-const-prop.patch - Add ipa-struct-reorg-bugfix.patch - Add ipa-struct-reorg.patch - Add medium-code-mode.patch - Add reduction-chain-slp-option.patch - Add reductions-slp-enhancement.patch - Add simplify-removing-subregs.patch - Add tighten-range-for-generating-csel.patch - Add vectorization-enhancement.patch
55 lines
2.0 KiB
Diff
55 lines
2.0 KiB
Diff
This backport contains 1 patch from gcc main stream tree.
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The commit id of these patchs list as following in the order of time.
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0001-re-PR-tree-optimization-92161-ICE-in-vect_get_vec_de.patch
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ae7f3143a3876378d051e64c8e68718f27c41075
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diff -Nurp a/gcc/testsuite/gfortran.dg/pr92161.f b/gcc/testsuite/gfortran.dg/pr92161.f
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--- a/gcc/testsuite/gfortran.dg/pr92161.f 1970-01-01 08:00:00.000000000 +0800
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+++ b/gcc/testsuite/gfortran.dg/pr92161.f 2020-08-17 10:18:05.996000000 +0800
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@@ -0,0 +1,23 @@
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+! { dg-do compile }
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+! { dg-options "-O1 -ftree-loop-vectorize -fno-signed-zeros -fno-trapping-math" }
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+! { dg-additional-options "-mvsx" { target { powerpc*-*-* } } }
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+ COMPLEX FUNCTION R1 (ZR, CC, EA, U6)
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+
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+ INTEGER ZR, U6, FZ, J2
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+ COMPLEX EA(*), CC
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+ DOUBLE PRECISION OS, GA, YU, XT
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+
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+ OS = DBLE(REAL(CC))
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+ GA = DBLE(AIMAG(CC))
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+ J2 = 1
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+
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+ DO 5 FZ = 1, ZR
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+ YU = DBLE(REAL(EA(J2)))
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+ XT = DBLE(AIMAG(EA(J2)))
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+ OS = OS + (YU * 2) - (XT * 2)
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+ GA = GA + (YU * 3) + (XT * 3)
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+ J2 = J2 + U6
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+ 5 CONTINUE
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+ R1 = CMPLX(REAL(OS), REAL(GA))
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+ RETURN
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+ END
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diff -Nurp a/gcc/tree-vect-loop.c b/gcc/tree-vect-loop.c
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--- a/gcc/tree-vect-loop.c 2020-08-17 10:17:08.288000000 +0800
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+++ b/gcc/tree-vect-loop.c 2020-08-17 10:18:05.996000000 +0800
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@@ -2339,6 +2339,17 @@ again:
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{
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stmt_vec_info stmt_info = loop_vinfo->lookup_stmt (gsi_stmt (si));
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STMT_SLP_TYPE (stmt_info) = loop_vect;
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+ if (STMT_VINFO_DEF_TYPE (stmt_info) == vect_reduction_def
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+ || STMT_VINFO_DEF_TYPE (stmt_info) == vect_double_reduction_def)
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+ {
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+ /* vectorizable_reduction adjusts reduction stmt def-types,
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+ restore them to that of the PHI. */
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+ STMT_VINFO_DEF_TYPE (STMT_VINFO_REDUC_DEF (stmt_info))
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+ = STMT_VINFO_DEF_TYPE (stmt_info);
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+ STMT_VINFO_DEF_TYPE (vect_stmt_to_vectorize
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+ (STMT_VINFO_REDUC_DEF (stmt_info)))
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+ = STMT_VINFO_DEF_TYPE (stmt_info);
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+ }
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}
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for (gimple_stmt_iterator si = gsi_start_bb (bb);
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!gsi_end_p (si); gsi_next (&si))
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