Sync patch from openeuler/gcc (cherry picked from commit 95427adf7d16bbb61ae3ced9c64aacbaf53dce72)
115 lines
3.2 KiB
Diff
115 lines
3.2 KiB
Diff
From 2f0d0b1298fb9c3266bb102796b027a5570ad833 Mon Sep 17 00:00:00 2001
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From: dingguangya <dingguangya1@huawei.com>
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Date: Mon, 4 Sep 2023 16:27:38 +0800
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Subject: [PATCH 1/2] [AArch64] Rewrite the tsv110 option
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Reset the more appropriate options for tsv110.
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---
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gcc/common/config/aarch64/aarch64-common.cc | 76 +++++++++++++++++++++
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1 file changed, 76 insertions(+)
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diff --git a/gcc/common/config/aarch64/aarch64-common.cc b/gcc/common/config/aarch64/aarch64-common.cc
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index dfda5b837..85ce8133b 100644
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--- a/gcc/common/config/aarch64/aarch64-common.cc
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+++ b/gcc/common/config/aarch64/aarch64-common.cc
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@@ -44,6 +44,8 @@
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#undef TARGET_OPTION_INIT_STRUCT
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#define TARGET_OPTION_INIT_STRUCT aarch64_option_init_struct
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+#define INVALID_IMP ((unsigned) -1)
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+
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/* Set default optimization options. */
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static const struct default_options aarch_option_optimization_table[] =
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{
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@@ -65,6 +67,77 @@ static const struct default_options aarch_option_optimization_table[] =
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{ OPT_LEVELS_NONE, 0, NULL, 0 }
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};
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+/* CPU vendor id. */
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+static unsigned vendor_id = INVALID_IMP;
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+
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+/* The part number of the CPU. */
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+static unsigned part_id = INVALID_IMP;
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+
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+/* Return the hex integer that is after ':' for the FIELD.
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+ Return -1 if there was problem parsing the integer. */
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+static unsigned
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+parse_cpuinfo (char *field)
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+{
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+ if (field == NULL)
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+ return INVALID_IMP;
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+ const char *rest = strchr (field, ':');
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+
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+ if (rest == NULL)
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+ return INVALID_IMP;
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+
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+ char *after;
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+ unsigned fint = strtol (rest + 1, &after, 16);
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+ if (after == rest + 1)
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+ return INVALID_IMP;
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+ return fint;
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+}
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+
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+/* Read CPU vendor_id and part_id. */
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+
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+static void
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+read_cpuinfo ()
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+{
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+ FILE *fp = fopen ("/proc/cpuinfo", "r");
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+ if (fp == NULL)
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+ return;
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+
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+ /* Read 1024-byte data from /proc/cpuinfo. */
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+ char cpuinfo[1024];
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+ fread(cpuinfo, sizeof(char), sizeof(cpuinfo) - 1, fp);
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+
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+ char *vendor = strstr(cpuinfo, "CPU implementer");
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+ vendor_id = parse_cpuinfo(vendor);
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+
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+ char *part = strstr(cpuinfo, "CPU part");
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+ part_id = parse_cpuinfo(part);
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+
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+ fclose(fp);
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+}
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+
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+/* Reset the tsv110 option. After checking the platform information,
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+ this function can reset the more appropriate options.
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+ TODO: Currently, this function is not applicable to the cross
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+ compilation scenario. */
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+
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+static void
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+reset_tsv110_option ()
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+{
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+ /* Read CPU Information. */
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+ if (vendor_id == INVALID_IMP)
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+ read_cpuinfo ();
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+
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+ if (vendor_id == 0x48 && part_id == 0xd01)
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+ {
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+ /* Outline-atomics is enabled by default and
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+ aarch64_flag_outline_atomics defaults to 2. Therefore, the current
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+ modification affects only the default scenario. When the option
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+ moutline-atomics is added, the value of aarch64_flag_outline_atomics is 1,
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+ that is, aarch64_flag_outline_atomics is not reset to 0. */
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+ if (aarch64_flag_outline_atomics == 2)
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+ aarch64_flag_outline_atomics = 0;
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+ }
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+}
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+
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/* Implement TARGET_HANDLE_OPTION.
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This function handles the target specific options for CPU/target selection.
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@@ -83,6 +156,9 @@ aarch64_handle_option (struct gcc_options *opts,
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const char *arg = decoded->arg;
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int val = decoded->value;
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+ /* Reset the tsv110 options. */
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+ reset_tsv110_option ();
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+
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switch (code)
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{
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case OPT_march_:
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--
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2.33.0
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