!460 LoongArch: Fix gnome-desktop boot error
From: @ticat-fp Reviewed-by: @xiongzhou4 Signed-off-by: @xiongzhou4
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37
LoongArch-Fixed-bug-in-bstrins_-mode-_for_ior_mask-t.patch
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37
LoongArch-Fixed-bug-in-bstrins_-mode-_for_ior_mask-t.patch
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@ -0,0 +1,37 @@
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From 245c9ef2b8574fcaf277416d5986f46c0babbbec Mon Sep 17 00:00:00 2001
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From: Li Wei <liwei@loongson.cn>
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Date: Mon, 25 Dec 2023 11:20:23 +0800
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Subject: [PATCH] LoongArch: Fixed bug in *bstrins_<mode>_for_ior_mask
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template.
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We found that using the latest compiled gcc will cause a miscompare error
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when running spec2006 400.perlbench test with -flto turned on. After testing,
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it was found that only the LoongArch architecture will report errors.
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The first error commit was located through the git bisect command as
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r14-3773-g5b857e87201335. Through debugging, it was found that the problem
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was that the split condition of the *bstrins_<mode>_for_ior_mask template was
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empty, which should actually be consistent with the insn condition.
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gcc/ChangeLog:
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* config/loongarch/loongarch.md: Adjust.
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---
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gcc/config/loongarch/loongarch.md | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
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index 7021105b241..2b0609f2f31 100644
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--- a/gcc/config/loongarch/loongarch.md
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+++ b/gcc/config/loongarch/loongarch.md
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@@ -1489,7 +1489,7 @@
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"loongarch_pre_reload_split () && \
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loongarch_use_bstrins_for_ior_with_mask (<MODE>mode, operands)"
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"#"
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- ""
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+ "&& true"
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[(set (match_dup 0) (match_dup 1))
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(set (zero_extract:GPR (match_dup 0) (match_dup 2) (match_dup 4))
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(match_dup 3))]
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--
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2.33.0
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112
LoongArch-Optimize-the-loading-of-immediate-numbers-.patch
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112
LoongArch-Optimize-the-loading-of-immediate-numbers-.patch
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From 96577dfae97e49a052c0b4d9843fb10f89632fd9 Mon Sep 17 00:00:00 2001
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From: Guo Jie <guojie@loongson.cn>
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Date: Thu, 23 Nov 2023 11:04:17 +0800
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Subject: [PATCH] LoongArch: Optimize the loading of immediate numbers with the
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same high and low 32-bit values
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For the following immediate load operation in gcc/testsuite/gcc.target/loongarch/imm-load1.c:
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long long r = 0x0101010101010101;
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Before this patch:
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lu12i.w $r15,16842752>>12
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ori $r15,$r15,257
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lu32i.d $r15,0x1010100000000>>32
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lu52i.d $r15,$r15,0x100000000000000>>52
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After this patch:
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lu12i.w $r15,16842752>>12
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ori $r15,$r15,257
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bstrins.d $r15,$r15,63,32
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gcc/ChangeLog:
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* config/loongarch/loongarch.cc
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(enum loongarch_load_imm_method): Add new method.
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(loongarch_build_integer): Add relevant implementations for
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new method.
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(loongarch_move_integer): Ditto.
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gcc/testsuite/ChangeLog:
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* gcc.target/loongarch/imm-load1.c: Change old check.
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---
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gcc/config/loongarch/loongarch.cc | 22 ++++++++++++++++++-
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.../gcc.target/loongarch/imm-load1.c | 3 ++-
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2 files changed, 23 insertions(+), 2 deletions(-)
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diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
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index 33357c670e1..c95fc83362e 100644
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--- a/gcc/config/loongarch/loongarch.cc
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+++ b/gcc/config/loongarch/loongarch.cc
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@@ -142,12 +142,16 @@ struct loongarch_address_info
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METHOD_LU52I:
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Load 52-63 bit of the immediate number.
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+
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+ METHOD_MIRROR:
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+ Copy 0-31 bit of the immediate number to 32-63bit.
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*/
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enum loongarch_load_imm_method
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{
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METHOD_NORMAL,
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METHOD_LU32I,
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- METHOD_LU52I
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+ METHOD_LU52I,
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+ METHOD_MIRROR
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};
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struct loongarch_integer_op
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@@ -1556,11 +1560,23 @@ loongarch_build_integer (struct loongarch_integer_op *codes,
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int sign31 = (value & (HOST_WIDE_INT_1U << 31)) >> 31;
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int sign51 = (value & (HOST_WIDE_INT_1U << 51)) >> 51;
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+
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+ uint32_t hival = (uint32_t) (value >> 32);
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+ uint32_t loval = (uint32_t) value;
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+
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/* Determine whether the upper 32 bits are sign-extended from the lower
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32 bits. If it is, the instructions to load the high order can be
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ommitted. */
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if (lu32i[sign31] && lu52i[sign31])
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return cost;
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+ /* If the lower 32 bits are the same as the upper 32 bits, just copy
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+ the lower 32 bits to the upper 32 bits. */
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+ else if (loval == hival)
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+ {
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+ codes[cost].method = METHOD_MIRROR;
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+ codes[cost].curr_value = value;
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+ return cost + 1;
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+ }
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/* Determine whether bits 32-51 are sign-extended from the lower 32
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bits. If so, directly load 52-63 bits. */
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else if (lu32i[sign31])
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@@ -3234,6 +3250,10 @@ loongarch_move_integer (rtx temp, rtx dest, unsigned HOST_WIDE_INT value)
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gen_rtx_AND (DImode, x, GEN_INT (0xfffffffffffff)),
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GEN_INT (codes[i].value));
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break;
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+ case METHOD_MIRROR:
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+ gcc_assert (mode == DImode);
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+ emit_insn (gen_insvdi (x, GEN_INT (32), GEN_INT (32), x));
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+ break;
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default:
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gcc_unreachable ();
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}
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diff --git a/gcc/testsuite/gcc.target/loongarch/imm-load1.c b/gcc/testsuite/gcc.target/loongarch/imm-load1.c
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index 2ff02971239..f64cc2956a3 100644
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--- a/gcc/testsuite/gcc.target/loongarch/imm-load1.c
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+++ b/gcc/testsuite/gcc.target/loongarch/imm-load1.c
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@@ -1,6 +1,7 @@
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/* { dg-do compile } */
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/* { dg-options "-mabi=lp64d -O2" } */
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-/* { dg-final { scan-assembler "test:.*lu52i\.d.*\n\taddi\.w.*\n\.L2:" } } */
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+/* { dg-final { scan-assembler-not "test:.*lu52i\.d.*\n\taddi\.w.*\n\.L2:" } } */
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+/* { dg-final { scan-assembler "test:.*lu12i\.w.*\n\tbstrins\.d.*\n\.L2:" } } */
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extern long long b[10];
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--
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2.33.0
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11
gcc.spec
11
gcc.spec
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%global gcc_major 12
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# Note, gcc_release must be integer, if you want to add suffixes to
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# %%{release}, append them after %%{gcc_release} on Release: line.
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%global gcc_release 32
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%global gcc_release 33
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%global _unpackaged_files_terminate_build 0
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%global _performance_build 1
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@ -336,6 +336,8 @@ Patch3128: LoongArch-Add-LA664-support.patch
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Patch3129: LoongArch-Fix-internal-error-running-gcc-march-nativ.patch
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Patch3130: LoongArch-Fix-lsx-vshuf.c-and-lasx-xvshuf_b.c-tests-.patch
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Patch3131: LoongArch-Fix-osdirname.patch
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Patch3132: LoongArch-Optimize-the-loading-of-immediate-numbers-.patch
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Patch3133: LoongArch-Fixed-bug-in-bstrins_-mode-_for_ior_mask-t.patch
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%endif
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# On ARM EABI systems, we do want -gnueabi to be part of the
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@ -1003,6 +1005,8 @@ not stable, so plugins must be rebuilt any time GCC is updated.
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%patch3129 -p1
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%patch3130 -p1
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%patch3131 -p1
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%patch3132 -p1
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%patch3133 -p1
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%endif
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echo '%{_vendor} %{version}-%{release}' > gcc/DEV-PHASE
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@ -3271,6 +3275,11 @@ end
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%doc rpm.doc/changelogs/libcc1/ChangeLog*
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%changelog
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* Wed Jul 24 2024 Peng Fan <fanpeng@loongson.cn> - 12.3.1-33
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- Type: Sync
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- DESC: Optimize the loading of immediate numbers.
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- Fixed bug in bstrins_<mode>for_ior_mask.
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* Fri Jun 14 2024 peng.zou <peng.zou@shingroup.cn> - 12.3.1-32
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- Type: SPEC
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- DESC: set default configuration for the ppc64le
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