167 lines
6.5 KiB
Diff
167 lines
6.5 KiB
Diff
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From 7cfe6e057045ac794afbe9097b1b211c0e1ea723 Mon Sep 17 00:00:00 2001
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From: Lulu Cheng <chenglulu@loongson.cn>
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Date: Thu, 6 Apr 2023 16:02:07 +0800
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Subject: [PATCH 039/124] LoongArch: Add built-in functions description of
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LoongArch Base instruction set instructions.
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gcc/ChangeLog:
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* doc/extend.texi: Add section for LoongArch Base Built-in functions.
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Signed-off-by: Peng Fan <fanpeng@loongson.cn>
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Signed-off-by: ticat_fp <fanpeng@loongson.cn>
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---
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gcc/doc/extend.texi | 129 ++++++++++++++++++++++++++++++++++++++++++++
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1 file changed, 129 insertions(+)
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diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
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index 3c101ca89..1d1bac255 100644
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--- a/gcc/doc/extend.texi
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+++ b/gcc/doc/extend.texi
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@@ -14678,6 +14678,7 @@ instructions, but allow the compiler to schedule those calls.
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* Blackfin Built-in Functions::
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* BPF Built-in Functions::
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* FR-V Built-in Functions::
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+* LoongArch Base Built-in Functions::
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* MIPS DSP Built-in Functions::
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* MIPS Paired-Single Support::
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* MIPS Loongson Built-in Functions::
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@@ -16128,6 +16129,134 @@ Use the @code{nldub} instruction to load the contents of address @var{x}
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into the data cache. The instruction is issued in slot I1@.
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@end table
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+@node LoongArch Base Built-in Functions
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+@subsection LoongArch Base Built-in Functions
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+
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+These built-in functions are available for LoongArch.
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+
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+Data Type Description:
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+@itemize
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+@item @code{imm0_31}, a compile-time constant in range 0 to 31;
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+@item @code{imm0_16383}, a compile-time constant in range 0 to 16383;
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+@item @code{imm0_32767}, a compile-time constant in range 0 to 32767;
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+@item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047;
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+@end itemize
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+
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+The intrinsics provided are listed below:
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+@smallexample
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+ unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
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+ void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
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+ void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
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+ unsigned int __builtin_loongarch_cpucfg (unsigned int)
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+ void __builtin_loongarch_asrtle_d (long int, long int)
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+ void __builtin_loongarch_asrtgt_d (long int, long int)
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+ long int __builtin_loongarch_lddir_d (long int, imm0_31)
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+ void __builtin_loongarch_ldpte_d (long int, imm0_31)
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+
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+ int __builtin_loongarch_crc_w_b_w (char, int)
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+ int __builtin_loongarch_crc_w_h_w (short, int)
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+ int __builtin_loongarch_crc_w_w_w (int, int)
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+ int __builtin_loongarch_crc_w_d_w (long int, int)
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+ int __builtin_loongarch_crcc_w_b_w (char, int)
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+ int __builtin_loongarch_crcc_w_h_w (short, int)
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+ int __builtin_loongarch_crcc_w_w_w (int, int)
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+ int __builtin_loongarch_crcc_w_d_w (long int, int)
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+
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+ unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
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+ unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
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+ unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
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+ unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
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+ unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
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+ unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)
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+
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+ unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
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+ unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
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+ unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
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+ unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
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+ void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
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+ void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
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+ void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
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+ void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)
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+
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+ void __builtin_loongarch_dbar (imm0_32767)
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+ void __builtin_loongarch_ibar (imm0_32767)
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+
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+ void __builtin_loongarch_syscall (imm0_32767)
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+ void __builtin_loongarch_break (imm0_32767)
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+@end smallexample
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+
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+@emph{Note:}Since the control register is divided into 32-bit and 64-bit,
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+but the access instruction is not distinguished. So GCC renames the control
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+instructions when implementing intrinsics.
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+
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+Take the csrrd instruction as an example, built-in functions are implemented as follows:
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+@smallexample
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+ __builtin_loongarch_csrrd_w // When reading the 32-bit control register use.
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+ __builtin_loongarch_csrrd_d // When reading the 64-bit control register use.
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+@end smallexample
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+
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+For the convenience of use, the built-in functions are encapsulated,
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+the encapsulated functions and @code{__drdtime_t, __rdtime_t} are
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+defined in the @code{larchintrin.h}. So if you call the following
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+function you need to include @code{larchintrin.h}.
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+
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+@smallexample
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+ typedef struct drdtime@{
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+ unsigned long dvalue;
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+ unsigned long dtimeid;
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+ @} __drdtime_t;
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+
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+ typedef struct rdtime@{
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+ unsigned int value;
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+ unsigned int timeid;
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+ @} __rdtime_t;
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+@end smallexample
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+
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+@smallexample
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+ __drdtime_t __rdtime_d (void)
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+ __rdtime_t __rdtimel_w (void)
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+ __rdtime_t __rdtimeh_w (void)
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+ unsigned int __movfcsr2gr (imm0_31)
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+ void __movgr2fcsr (imm0_31, unsigned int)
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+ void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
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+ unsigned int __cpucfg (unsigned int)
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+ void __asrtle_d (long int, long int)
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+ void __asrtgt_d (long int, long int)
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+ long int __lddir_d (long int, imm0_31)
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+ void __ldpte_d (long int, imm0_31)
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+
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+ int __crc_w_b_w (char, int)
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+ int __crc_w_h_w (short, int)
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+ int __crc_w_w_w (int, int)
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+ int __crc_w_d_w (long int, int)
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+ int __crcc_w_b_w (char, int)
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+ int __crcc_w_h_w (short, int)
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+ int __crcc_w_w_w (int, int)
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+ int __crcc_w_d_w (long int, int)
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+
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+ unsigned int __csrrd_w (imm0_16383)
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+ unsigned int __csrwr_w (unsigned int, imm0_16383)
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+ unsigned int __csrxchg_w (unsigned int, unsigned int, imm0_16383)
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+ unsigned long __csrrd_d (imm0_16383)
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+ unsigned long __csrwr_d (unsigned long, imm0_16383)
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+ unsigned long __csrxchg_d (unsigned long, unsigned long, imm0_16383)
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+
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+ unsigned char __iocsrrd_b (unsigned int)
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+ unsigned short __iocsrrd_h (unsigned int)
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+ unsigned int __iocsrrd_w (unsigned int)
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+ unsigned long __iocsrrd_d (unsigned int)
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+ void __iocsrwr_b (unsigned char, unsigned int)
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+ void __iocsrwr_h (unsigned short, unsigned int)
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+ void __iocsrwr_w (unsigned int, unsigned int)
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+ void __iocsrwr_d (unsigned long, unsigned int)
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+
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+ void __dbar (imm0_32767)
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+ void __ibar (imm0_32767)
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+
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+ void __syscall (imm0_32767)
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+ void __break (imm0_32767)
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+@end smallexample
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+
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@node MIPS DSP Built-in Functions
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@subsection MIPS DSP Built-in Functions
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--
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2.33.0
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