35 lines
1.4 KiB
Diff
35 lines
1.4 KiB
Diff
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This backport contains 1 patch from gcc main stream tree.
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The commit id of these patchs list as following in the order of time.
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0001-aarch64-Fix-mismatched-SVE-predicate-modes.patch
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26bebf576ddcdcfb596f07e8c2896f17c48516e7
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diff -urpN a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
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--- a/gcc/config/aarch64/aarch64.c 2020-12-14 00:57:20.128000000 -0500
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+++ b/gcc/config/aarch64/aarch64.c 2020-12-14 01:00:15.080000000 -0500
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@@ -4328,6 +4328,7 @@ aarch64_expand_sve_const_pred_eor (rtx t
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/* EOR the result with an ELT_SIZE PTRUE. */
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rtx mask = aarch64_ptrue_all (elt_size);
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mask = force_reg (VNx16BImode, mask);
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+ inv = gen_lowpart (VNx16BImode, inv);
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target = aarch64_target_reg (target, VNx16BImode);
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emit_insn (gen_aarch64_pred_z (XOR, VNx16BImode, target, mask, inv, mask));
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return target;
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diff -urpN a/gcc/testsuite/gcc.dg/vect/pr94606.c b/gcc/testsuite/gcc.dg/vect/pr94606.c
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--- a/gcc/testsuite/gcc.dg/vect/pr94606.c 1969-12-31 19:00:00.000000000 -0500
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+++ b/gcc/testsuite/gcc.dg/vect/pr94606.c 2020-12-14 01:00:15.080000000 -0500
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@@ -0,0 +1,13 @@
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+/* { dg-do compile } */
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+/* { dg-additional-options "-march=armv8.2-a+sve -msve-vector-bits=256" { target aarch64*-*-* } } */
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+
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+const short mask[] = { 0, 0, 0, 0, 0, 0, 0, 0,
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+ 0, 0, 0, 1, 1, 1, 1, 1 };
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+
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+int
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+foo (short *restrict x, short *restrict y)
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+{
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+ for (int i = 0; i < 16; ++i)
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+ if (mask[i])
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+ x[i] += y[i];
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+}
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