68 lines
1.9 KiB
Diff
68 lines
1.9 KiB
Diff
|
|
This backport contains 1 patch from gcc main stream tree.
|
||
|
|
The commit id of these patchs list as following in the order of time.
|
||
|
|
|
||
|
|
0001-AArch64-Fix-constraints-for-CPY-M.patch
|
||
|
|
3c2707f33af46ac145769872b65e25fd0b870903
|
||
|
|
|
||
|
|
diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
|
||
|
|
index cbf29a82e28..59bf4a69507 100644
|
||
|
|
--- a/gcc/config/aarch64/aarch64-sve.md
|
||
|
|
+++ b/gcc/config/aarch64/aarch64-sve.md
|
||
|
|
@@ -6523,7 +6523,7 @@
|
||
|
|
(define_insn "@aarch64_sel_dup<mode>"
|
||
|
|
[(set (match_operand:SVE_FULL 0 "register_operand" "=?w, w, ??w, ?&w, ??&w, ?&w")
|
||
|
|
(unspec:SVE_FULL
|
||
|
|
- [(match_operand:<VPRED> 3 "register_operand" "Upa, Upa, Upl, Upl, Upl, Upl")
|
||
|
|
+ [(match_operand:<VPRED> 3 "register_operand" "Upl, Upl, Upl, Upl, Upl, Upl")
|
||
|
|
(vec_duplicate:SVE_FULL
|
||
|
|
(match_operand:<VEL> 1 "register_operand" "r, w, r, w, r, w"))
|
||
|
|
(match_operand:SVE_FULL 2 "aarch64_simd_reg_or_zero" "0, 0, Dz, Dz, w, w")]
|
||
|
|
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cpy_1.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cpy_1.c
|
||
|
|
new file mode 100644
|
||
|
|
index 00000000000..1d8f429caeb
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/cpy_1.c
|
||
|
|
@@ -0,0 +1,42 @@
|
||
|
|
+/* { dg-do compile } */
|
||
|
|
+/* { dg-options "-O" } */
|
||
|
|
+/* { dg-final { check-function-bodies "**" "" } } */
|
||
|
|
+
|
||
|
|
+#include <arm_sve.h>
|
||
|
|
+
|
||
|
|
+#ifdef __cplusplus
|
||
|
|
+extern "C" {
|
||
|
|
+#endif
|
||
|
|
+
|
||
|
|
+/*
|
||
|
|
+** dup_x0_m:
|
||
|
|
+** add (x[0-9]+), x0, #?1
|
||
|
|
+** mov (p[0-7])\.b, p15\.b
|
||
|
|
+** mov z0\.d, \2/m, \1
|
||
|
|
+** ret
|
||
|
|
+*/
|
||
|
|
+svuint64_t
|
||
|
|
+dup_x0_m (svuint64_t z0, uint64_t x0)
|
||
|
|
+{
|
||
|
|
+ register svbool_t pg asm ("p15");
|
||
|
|
+ asm volatile ("" : "=Upa" (pg));
|
||
|
|
+ return svdup_u64_m (z0, pg, x0 + 1);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+/*
|
||
|
|
+** dup_d1_z:
|
||
|
|
+** mov (p[0-7])\.b, p15\.b
|
||
|
|
+** mov z0\.d, \1/m, d1
|
||
|
|
+** ret
|
||
|
|
+*/
|
||
|
|
+svfloat64_t
|
||
|
|
+dup_d1_z (svfloat64_t z0, float64_t d1)
|
||
|
|
+{
|
||
|
|
+ register svbool_t pg asm ("p15");
|
||
|
|
+ asm volatile ("" : "=Upa" (pg));
|
||
|
|
+ return svdup_f64_m (z0, pg, d1);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+#ifdef __cplusplus
|
||
|
|
+}
|
||
|
|
+#endif
|