91 lines
3.2 KiB
Diff
91 lines
3.2 KiB
Diff
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From de803130fa7d33afaf6e2fc42ef1cd97e45edf96 Mon Sep 17 00:00:00 2001
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From: Guo Jie <guojie@loongson.cn>
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Date: Fri, 1 Sep 2023 16:35:05 +0800
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Subject: [PATCH 057/124] LoongArch: Support storing floating-point zero into
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MEM[base + index].
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v2: Modify commit message.
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gcc/ChangeLog:
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* config/loongarch/loongarch.md: Support 'G' -> 'k' in
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movsf_hardfloat and movdf_hardfloat.
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gcc/testsuite/ChangeLog:
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* gcc.target/loongarch/const-double-zero-stx.c: New test.
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Signed-off-by: Peng Fan <fanpeng@loongson.cn>
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Signed-off-by: ticat_fp <fanpeng@loongson.cn>
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---
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gcc/config/loongarch/loongarch.md | 12 ++++++------
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.../loongarch/const-double-zero-stx.c | 18 ++++++++++++++++++
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2 files changed, 24 insertions(+), 6 deletions(-)
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create mode 100644 gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
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diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
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index a5e9352ca..2d269794f 100644
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--- a/gcc/config/loongarch/loongarch.md
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+++ b/gcc/config/loongarch/loongarch.md
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@@ -1915,13 +1915,13 @@
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})
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(define_insn "*movsf_hardfloat"
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- [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,m,f,k,m,*f,*r,*r,*r,*m")
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- (match_operand:SF 1 "move_operand" "f,G,m,f,k,f,G,*r,*f,*G*r,*m,*r"))]
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+ [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,f,m,f,k,m,k,*f,*r,*r,*r,*m")
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+ (match_operand:SF 1 "move_operand" "f,G,m,f,k,f,G,G,*r,*f,*G*r,*m,*r"))]
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"TARGET_HARD_FLOAT
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&& (register_operand (operands[0], SFmode)
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|| reg_or_0_operand (operands[1], SFmode))"
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{ return loongarch_output_move (operands[0], operands[1]); }
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- [(set_attr "move_type" "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,mgtf,mftg,move,load,store")
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+ [(set_attr "move_type" "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,store,mgtf,mftg,move,load,store")
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(set_attr "mode" "SF")])
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(define_insn "*movsf_softfloat"
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@@ -1946,13 +1946,13 @@
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})
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(define_insn "*movdf_hardfloat"
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- [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,m,f,k,m,*f,*r,*r,*r,*m")
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- (match_operand:DF 1 "move_operand" "f,G,m,f,k,f,G,*r,*f,*r*G,*m,*r"))]
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+ [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,f,m,f,k,m,k,*f,*r,*r,*r,*m")
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+ (match_operand:DF 1 "move_operand" "f,G,m,f,k,f,G,G,*r,*f,*r*G,*m,*r"))]
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"TARGET_DOUBLE_FLOAT
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&& (register_operand (operands[0], DFmode)
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|| reg_or_0_operand (operands[1], DFmode))"
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{ return loongarch_output_move (operands[0], operands[1]); }
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- [(set_attr "move_type" "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,mgtf,mftg,move,load,store")
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+ [(set_attr "move_type" "fmove,mgtf,fpload,fpstore,fpload,fpstore,store,store,mgtf,mftg,move,load,store")
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(set_attr "mode" "DF")])
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(define_insn "*movdf_softfloat"
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diff --git a/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
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new file mode 100644
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index 000000000..8fb04be8f
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/const-double-zero-stx.c
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@@ -0,0 +1,18 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2" } */
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+/* { dg-final { scan-assembler-times {stx\..\t\$r0} 2 } } */
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+
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+extern float arr_f[];
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+extern double arr_d[];
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+
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+void
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+test_f (int base, int index)
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+{
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+ arr_f[base + index] = 0.0;
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+}
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+
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+void
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+test_d (int base, int index)
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+{
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+ arr_d[base + index] = 0.0;
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+}
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--
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2.33.0
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