From 9a494eb2155c9cf782cc35171f49ef012f3817ad Mon Sep 17 00:00:00 2001
From: maqi <maqi@uniontech.com>
Date: Tue, 4 Mar 2025 18:06:10 +0800
Subject: [PATCH] add sw_64 support

---
 builds/make.new/config/config.guess     | 3 +++
 builds/make.new/config/config.sub       | 1 +
 src/common/classes/DbImplementation.cpp | 1 +
 src/common/common.h                     | 7 ++++++-
 4 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/builds/make.new/config/config.guess b/builds/make.new/config/config.guess
index e81d3ae..595846d 100755
--- a/builds/make.new/config/config.guess
+++ b/builds/make.new/config/config.guess
@@ -1140,6 +1140,9 @@ EOF
     sparc:Linux:*:* | sparc64:Linux:*:*)
 	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
 	;;
+    sw_64:Linux:*:*)
+	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
+	;;
     tile*:Linux:*:*)
 	GUESS=$UNAME_MACHINE-unknown-linux-$LIBC
 	;;
diff --git a/builds/make.new/config/config.sub b/builds/make.new/config/config.sub
index d80c5d7..69d3401 100755
--- a/builds/make.new/config/config.sub
+++ b/builds/make.new/config/config.sub
@@ -1254,6 +1254,7 @@ case $cpu-$vendor in
 			| sparclite \
 			| sparcv8 | sparcv9 | sparcv9b | sparcv9v | sv1 | sx* \
 			| spu \
+                        | sw_64 \
 			| tahoe \
 			| thumbv7* \
 			| tic30 | tic4x | tic54x | tic55x | tic6x | tic80 \
diff --git a/src/common/classes/DbImplementation.cpp b/src/common/classes/DbImplementation.cpp
index 4f2def6..0aeaa25 100644
--- a/src/common/classes/DbImplementation.cpp
+++ b/src/common/classes/DbImplementation.cpp
@@ -40,6 +40,7 @@ static const UCHAR CpuMipsel = 5;
 static const UCHAR CpuMips = 6;
 static const UCHAR CpuArm = 7;
 static const UCHAR CpuLoongarch64 = 19;
+static const UCHAR CpuSw_64 = 20;
 static const UCHAR CpuIa64 = 8;
 static const UCHAR CpuS390 = 9;
 static const UCHAR CpuS390x = 10;
diff --git a/src/common/common.h b/src/common/common.h
index a1aa31e..ae9a067 100644
--- a/src/common/common.h
+++ b/src/common/common.h
@@ -148,6 +148,11 @@
 #define RISC_ALIGNMENT
 #endif /* sparc */
 
+#if defined(sw_64) || defined(__sw_64) || defined(__sw_64__)
+#define Sw_64
+#define FB_CPU CpuSw_64
+#endif /* sw_64 */
+
 #ifdef _LOONGARCH_ARCH
 #define FB_CPU CpuLoongarch64
 #endif /* loongarch64 */
@@ -920,7 +925,7 @@ void GDS_breakpoint(int);
 // ASF: Currently, all little-endian are FB_SWAP_DOUBLE and big-endian aren't.
 // AP: Define it for your hardware correctly in case your CPU do not follow mentioned rule.
 //     The follwoing lines are kept for reference only.
-//#if defined(i386) || defined(I386) || defined(_M_IX86) || defined(AMD64) || defined(ARM) || defined(_LOONGARCH_ARCH) || defined(MIPSEL) || defined(DARWIN64) || defined(IA64)
+//#if defined(i386) || defined(I386) || defined(_M_IX86) || defined(AMD64) || defined(ARM) || defined(_LOONGARCH_ARCH) || defined(Sw_64) || defined(sw_64) || defined(__sw_64) || defined(__sw_64__) || defined(MIPSEL) || defined(DARWIN64) || defined(IA64)
 //#define		FB_SWAP_DOUBLE 1
 //#elif defined(sparc) || defined(PowerPC) || defined(PPC) || defined(__ppc__) || defined(HPUX) || defined(MIPS) || defined(__ppc64__)
 //#define		FB_SWAP_DOUBLE 0
-- 
2.39.3

