8f8a38d6e0
The live migration of Hygon CSV1/2/3 guest depends on the KVM
hypercall KVM_HC_MAP_GPA_RANGE, add code to sync page enc/dec
status to KVM.
The MMIO routine of VC handler will get memory encrypt status to
validate MMIO address. MemEncryptSevGetEncryptionMask() will enable
interrupt while interrupt must be disabled during VC. During DXE
stage, VC routine as below:
CcExitHandleVc
-> MemEncryptSevGetAddressRangeState
-> MemEncryptSevGetEncryptionMask->PcdGet64(PcdPteMemoryEncryptionAddressOrMask)
Signed-off-by: hanliyang <hanliyang@hygon.cn>
45 lines
1.4 KiB
Diff
45 lines
1.4 KiB
Diff
From 16e7adce62f7c28cc1823229b40a27493737cae6 Mon Sep 17 00:00:00 2001
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From: Ashish Kalra <ashish.kalra@amd.com>
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Date: Tue, 5 Apr 2022 16:30:54 +0000
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Subject: [PATCH 5/9] OvmfPkg/PlatformPei: Mark SEC GHCB page as unencrypted
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via hypercall
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cherry-picked from https://patchew.org/EDK2/cover.1629380011.git.ashish.kalra@amd.com .
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Mark the SEC GHCB page (that is mapped as unencrypted in
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ResetVector code) in the hypervisor's guest page encryption
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state tracking.
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Cc: Jordan Justen <jordan.l.justen@intel.com>
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Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>
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Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
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---
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OvmfPkg/PlatformPei/AmdSev.c | 11 +++++++++++
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1 file changed, 11 insertions(+)
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diff --git a/OvmfPkg/PlatformPei/AmdSev.c b/OvmfPkg/PlatformPei/AmdSev.c
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index e6b602d7..553e841e 100644
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--- a/OvmfPkg/PlatformPei/AmdSev.c
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+++ b/OvmfPkg/PlatformPei/AmdSev.c
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@@ -229,6 +229,17 @@ AmdSevEsInitialize (
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Status = PcdSetBoolS (PcdSevEsIsEnabled, TRUE);
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ASSERT_RETURN_ERROR (Status);
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+ //
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+ // The SEC Ghcb setup during reset-vector needs to be marked as
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+ // decrypted in the hypervisor's guest page encryption state
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+ // tracking.
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+ //
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+ SetMemoryEncDecHypercall3 (
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+ FixedPcdGet32 (PcdOvmfSecGhcbBase),
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+ EFI_SIZE_TO_PAGES (FixedPcdGet32 (PcdOvmfSecGhcbSize)),
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+ FALSE
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+ );
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+
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//
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// Allocate GHCB and per-CPU variable pages.
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// Since the pages must survive across the UEFI to OS transition
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--
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2.25.1
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