Add bugfixes for hns3 PMD to sync upstream branch. Signed-off-by: speech_white <humin29@huawei.com>
78 lines
2.9 KiB
Diff
78 lines
2.9 KiB
Diff
From 54cda7e32e96a2217e39de257c2dec42bb13a272 Mon Sep 17 00:00:00 2001
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From: Chengwen Feng <fengchengwen@huawei.com>
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Date: Mon, 28 Jun 2021 10:57:51 +0800
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Subject: [PATCH 13/26] net/hns3: fix Arm SVE build with GCC 8.3
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If the target machine has SVE feature (e.g. '-march=armv8.2-a+sve'),
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and compiler is gcc-8.3, it will fail, the error is arm_sve.h:
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no such file or directory.
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The solution:
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a. If RTE_HAS_SVE_ACLE defined (it means the minimum instruction set
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support SVE ACLE) then compiles it.
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b. Else if the compiler support SVE ACLE then compiles it.
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c. Otherwise don't compile it.
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Fixes: 8c25b02b082a ("net/hns3: fix enabling SVE Rx/Tx")
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Fixes: 952ebacce4f2 ("net/hns3: support SVE Rx")
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Cc: stable@dpdk.org
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Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
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Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
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---
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drivers/net/hns3/hns3_rxtx.c | 2 +-
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drivers/net/hns3/meson.build | 26 ++++++++++++++++++++++----
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2 files changed, 23 insertions(+), 5 deletions(-)
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diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
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index 51b727f..d8b79c3 100644
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--- a/drivers/net/hns3/hns3_rxtx.c
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+++ b/drivers/net/hns3/hns3_rxtx.c
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@@ -2811,7 +2811,7 @@ hns3_get_default_vec_support(void)
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static bool
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hns3_get_sve_support(void)
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{
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-#if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_SVE)
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+#if defined(RTE_HAS_SVE_ACLE)
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if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_256)
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return false;
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if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SVE))
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diff --git a/drivers/net/hns3/meson.build b/drivers/net/hns3/meson.build
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index 6d78c33..bf602af 100644
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--- a/drivers/net/hns3/meson.build
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+++ b/drivers/net/hns3/meson.build
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@@ -32,8 +32,26 @@ sources = files('hns3_cmd.c',
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deps += ['hash']
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if arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
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- sources += files('hns3_rxtx_vec.c')
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- if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
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- sources += files('hns3_rxtx_vec_sve.c')
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- endif
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+ sources += files('hns3_rxtx_vec.c')
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+
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+ # compile SVE when:
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+ # a. support SVE in minimum instruction set baseline
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+ # b. it's not minimum instruction set, but compiler support
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+ if dpdk_conf.has('RTE_HAS_SVE_ACLE')
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+ sources += files('hns3_rxtx_vec_sve.c')
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+ elif cc.has_argument('-march=armv8.2-a+sve') and cc.check_header('arm_sve.h')
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+ cflags += ['-DRTE_HAS_SVE_ACLE=1']
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+ sve_cflags = []
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+ foreach flag: cflags
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+ if not (flag.startswith('-march=') or flag.startswith('-mcpu=') or flag.startswith('-mtune='))
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+ sve_cflags += flag
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+ endif
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+ endforeach
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+ hns3_sve_lib = static_library('hns3_sve_lib',
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+ 'hns3_rxtx_vec_sve.c',
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+ dependencies: [static_rte_ethdev],
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+ include_directories: includes,
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+ c_args: [sve_cflags, '-march=armv8.2-a+sve'])
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+ objs += hns3_sve_lib.extract_objects('hns3_rxtx_vec_sve.c')
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+ endif
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endif
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--
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2.7.4
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