1f34bd76e4
Sync some patches for hns3 about refactor mailbox, add new API for RSS, support power monitor and some bugfix, modifies are as follow: - app/testpmd: fix crash in multi -process forwarding - net/hns3: support power monitor - net/hns3: remove QinQ insert support for VF - net/hns3: fix reset level comparison - net/hns3: fix disable command with firmware - net/hns3: fix VF multiple count on one reset - net/hns3: refactor handle mailbox function - net/hns3: refactor send mailbox function - net/hns3: refactor PF mailbox message struct - net/hns3: refactor VF mailbox message struct - app/testpmd: set RSS hash algorithm - ethdev: get RSS hash algorithm by name - ring: add telemetry command for ring info - ring: add telemetry command to list rings - eal: introduce more macros for bit definition - dmadev: add tracepoints in data path API - dmadev: add telemetry capability for m2d auto free - maintainers: update for DMA device performance tool Signed-off-by: Dengdui Huang <huangdengdui@huawei.com>
115 lines
3.6 KiB
Diff
115 lines
3.6 KiB
Diff
From a9364470e9198353e6ed8e28b0b86e6b2b7ce5b3 Mon Sep 17 00:00:00 2001
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From: Dengdui Huang <huangdengdui@huawei.com>
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Date: Fri, 8 Dec 2023 15:44:14 +0800
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Subject: [PATCH 25/30] net/hns3: fix VF multiple count on one reset
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[ upstream commit 072a07a9dcbd604b1983bf2cb266d3dd4dc89824 ]
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There are two ways for the hns3 VF driver to know reset event, namely,
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interrupt task and periodic detection task. For the latter, the real
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reset process will delay several microseconds to execute. Both tasks
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cause the count to increase by 1.
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However, the periodic detection task also detects a reset event A
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after interrupt task receive a reset event A. As a result, the reset
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count will be double.
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So this patch adds the comparison of reset level for VF in case of the
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multiple reset count.
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Fixes: a5475d61fa34 ("net/hns3: support VF")
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Cc: stable@dpdk.org
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Signed-off-by: Dengdui Huang <huangdengdui@huawei.com>
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Signed-off-by: Jie Hai <haijie1@huawei.com>
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---
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drivers/net/hns3/hns3_ethdev_vf.c | 44 ++++++++++++++++++++-----------
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1 file changed, 29 insertions(+), 15 deletions(-)
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diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
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index f5a7a2b..83d3d66 100644
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--- a/drivers/net/hns3/hns3_ethdev_vf.c
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+++ b/drivers/net/hns3/hns3_ethdev_vf.c
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@@ -569,13 +569,8 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
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val = hns3_read_dev(hw, HNS3_VF_RST_ING);
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hns3_write_dev(hw, HNS3_VF_RST_ING, val | HNS3_VF_RST_ING_BIT);
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val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RST_INT_B);
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- if (clearval) {
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- hw->reset.stats.global_cnt++;
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- hns3_warn(hw, "Global reset detected, clear reset status");
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- } else {
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- hns3_schedule_delayed_reset(hns);
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- hns3_warn(hw, "Global reset detected, don't clear reset status");
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- }
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+ hw->reset.stats.global_cnt++;
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+ hns3_warn(hw, "Global reset detected, clear reset status");
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ret = HNS3VF_VECTOR0_EVENT_RST;
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goto out;
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@@ -590,9 +585,9 @@ hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
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val = 0;
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ret = HNS3VF_VECTOR0_EVENT_OTHER;
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+
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out:
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- if (clearval)
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- *clearval = val;
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+ *clearval = val;
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return ret;
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}
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@@ -1731,11 +1726,25 @@ is_vf_reset_done(struct hns3_hw *hw)
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return true;
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}
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+static enum hns3_reset_level
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+hns3vf_detect_reset_event(struct hns3_hw *hw)
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+{
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+ enum hns3_reset_level reset = HNS3_NONE_RESET;
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+ uint32_t cmdq_stat_reg;
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+
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+ cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG);
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+ if (BIT(HNS3_VECTOR0_RST_INT_B) & cmdq_stat_reg)
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+ reset = HNS3_VF_RESET;
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+
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+ return reset;
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+}
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+
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bool
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hns3vf_is_reset_pending(struct hns3_adapter *hns)
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{
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+ enum hns3_reset_level last_req;
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struct hns3_hw *hw = &hns->hw;
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- enum hns3_reset_level reset;
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+ enum hns3_reset_level new_req;
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/*
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* According to the protocol of PCIe, FLR to a PF device resets the PF
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@@ -1758,13 +1767,18 @@ hns3vf_is_reset_pending(struct hns3_adapter *hns)
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return false;
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- hns3vf_check_event_cause(hns, NULL);
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- reset = hns3vf_get_reset_level(hw, &hw->reset.pending);
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- if (hw->reset.level != HNS3_NONE_RESET && reset != HNS3_NONE_RESET &&
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- hw->reset.level < reset) {
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- hns3_warn(hw, "High level reset %d is pending", reset);
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+ new_req = hns3vf_detect_reset_event(hw);
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+ if (new_req == HNS3_NONE_RESET)
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+ return false;
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+
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+ last_req = hns3vf_get_reset_level(hw, &hw->reset.pending);
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+ if (last_req == HNS3_NONE_RESET || last_req < new_req) {
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+ __atomic_store_n(&hw->reset.disable_cmd, 1, __ATOMIC_RELAXED);
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+ hns3_schedule_delayed_reset(hns);
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+ hns3_warn(hw, "High level reset detected, delay do reset");
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return true;
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}
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+
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return false;
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}
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--
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2.33.0
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