!607 [sync] PR-606: sync some patchs from upstreaming
From: @openeuler-sync-bot Reviewed-by: @li-huisong Signed-off-by: @li-huisong
This commit is contained in:
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6cc7d918a8
212
0044-net-hns3-support-more-VLAN-fields-matching.patch
Normal file
212
0044-net-hns3-support-more-VLAN-fields-matching.patch
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@ -0,0 +1,212 @@
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From 127b8563fabbdb41a4b70704703b2cca693bedd9 Mon Sep 17 00:00:00 2001
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From: Jie Hai <haijie1@huawei.com>
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Date: Thu, 4 Jul 2024 10:15:38 +0800
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Subject: [PATCH] net/hns3: support more VLAN fields matching
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[ upstream commit 051d4bc943ff37bd9310bb76d8b0b9dad77fa14b ]
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The commit 09315fc83861 ("ethdev: add VLAN attributes to ethernet
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and VLAN items") introduces ``has_vlan`` and ``has_more_vlan``
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fields in items ETH and VLAN. This patch adds support for these
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fields. The usage is documented in hns3.rst.
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Signed-off-by: Jie Hai <haijie1@huawei.com>
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---
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doc/guides/nics/hns3.rst | 68 ++++++++++++++++++++++++++++++++++++
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drivers/net/hns3/hns3_fdir.h | 4 +++
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drivers/net/hns3/hns3_flow.c | 47 ++++++++++++++++++++++---
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3 files changed, 115 insertions(+), 4 deletions(-)
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diff --git a/doc/guides/nics/hns3.rst b/doc/guides/nics/hns3.rst
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index 3e84d1f..97b4686 100644
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--- a/doc/guides/nics/hns3.rst
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+++ b/doc/guides/nics/hns3.rst
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@@ -234,6 +234,74 @@ src_port=32, dst_port=32`` to queue 1:
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dst is 2.2.2.5 / udp src is 32 dst is 32 / end \
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actions mark id 1 / queue index 1 / end
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+The flow rules::
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+
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+ rule-0: flow create 0 ingress pattern eth / end \
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+ queue index 1 / end
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+ rule-1: flow create 0 ingress pattern eth / vlan vid is 10 / end \
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+ queue index 1 / end
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+ rule-2: flow create 0 ingress pattern eth / vlan / vlan vid is 10 / end \
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+ queue index 1 / end
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+ rule-3: flow create 0 ingress pattern eth / vlan vid is 10 / vlan vid is 11 / end \
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+ queue index 1 / end
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+
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+will match the following packet types with specific VLAN ID at the specified VLAN layer
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+and any VLAN ID at the rest VLAN layer.
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+
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+ +--------+------------------+-------------------------------------------+
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+ | rules | ``strict`` | ``nostrict`` |
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+ +========+==================+===========================================+
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+ | rule-0 | untagged | untagged || single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-1 | single-tagged | single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-2 | double-tagged | multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-3 | double-tagged | multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+
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+The attributes ``has_vlan`` and ``has_more_vlan`` are supported.
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+The usage is as follows::
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+
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+ rule-4: flow create 0 ingress pattern eth has_vlan is 1 / end \
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+ queue index 1 / end
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+ rule-5: flow create 0 ingress pattern eth has_vlan is 0 / end \
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+ queue index 1 / end
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+ rule-6: flow create 0 ingress pattern eth / vlan has_more_vlan is 1 / \
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+ end queue index 1 / end
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+ rule-7: flow create 0 ingress pattern eth / vlan has_more_vlan is 0 / \
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+ end queue index 1 / end
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+
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+They will match the following packet types with any VLAN ID.
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+
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+ +--------+------------------+-------------------------------------------+
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+ | rules | ``strict`` | ``nostrict`` |
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+ +========+==================+===========================================+
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+ | rule-4 | single-tagged | untagged || single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-5 | untagged | untagged || single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-6 | double-tagged | untagged || single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+ | rule-7 | single-tagged | untagged || single-tagged || multi-tagged |
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+ +--------+------------------+-------------------------------------------+
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+
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+These two fields may be used followed by VLAN item,
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+and may partially overlap or conflict with the VLAN item.
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+For examples, the rule-8 will be rejected by the driver
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+and rule-9, rule-10 are repeated with rule-4.
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+Similar usage for ``has_more_vlan``.
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+
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+::
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+
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+ rule-8: flow create 0 ingress pattern eth has_vlan is 0 / vlan / end \
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+ queue index 1 / end
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+ rule-9: flow create 0 ingress pattern eth has_vlan is 1 / vlan / end \
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+ queue index 1 / end
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+ rule-10: flow create 0 ingress pattern eth / vlan / end \
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+ queue index 1 / end
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+
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+
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Generic flow API
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~~~~~~~~~~~~~~~~
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diff --git a/drivers/net/hns3/hns3_fdir.h b/drivers/net/hns3/hns3_fdir.h
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index 308cfbe..6ccd90a 100644
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--- a/drivers/net/hns3/hns3_fdir.h
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+++ b/drivers/net/hns3/hns3_fdir.h
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@@ -160,6 +160,10 @@ struct hns3_fdir_rule {
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uint16_t nb_queues;
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uint16_t location;
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struct rte_flow_action_count act_cnt;
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+ bool has_vlan_m;
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+ bool has_vlan_v;
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+ bool has_more_vlan_m;
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+ bool has_more_vlan_v;
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};
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/* FDIR filter list structure */
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diff --git a/drivers/net/hns3/hns3_flow.c b/drivers/net/hns3/hns3_flow.c
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index 7fbe653..37eb2b4 100644
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--- a/drivers/net/hns3/hns3_flow.c
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+++ b/drivers/net/hns3/hns3_flow.c
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@@ -616,8 +616,8 @@ hns3_parse_eth(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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if (item->spec == NULL && item->mask == NULL)
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return 0;
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- if (item->mask) {
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- eth_mask = item->mask;
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+ eth_mask = item->mask;
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+ if (eth_mask) {
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if (eth_mask->hdr.ether_type) {
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hns3_set_bit(rule->input_set, INNER_ETH_TYPE, 1);
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rule->key_conf.mask.ether_type =
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@@ -633,9 +633,16 @@ hns3_parse_eth(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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memcpy(rule->key_conf.mask.dst_mac,
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eth_mask->hdr.dst_addr.addr_bytes, RTE_ETHER_ADDR_LEN);
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}
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+ if (eth_mask->has_vlan)
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+ rule->has_vlan_m = true;
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}
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eth_spec = item->spec;
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+ if (eth_mask && eth_mask->has_vlan && eth_spec->has_vlan) {
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+ rule->key_conf.vlan_num++;
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+ rule->has_vlan_v = true;
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+ }
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+
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rule->key_conf.spec.ether_type = rte_be_to_cpu_16(eth_spec->hdr.ether_type);
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memcpy(rule->key_conf.spec.src_mac, eth_spec->hdr.src_addr.addr_bytes,
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RTE_ETHER_ADDR_LEN);
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@@ -651,6 +658,26 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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const struct rte_flow_item_vlan *vlan_spec;
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const struct rte_flow_item_vlan *vlan_mask;
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+ if (rule->has_vlan_m && !rule->has_vlan_v)
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+ return rte_flow_error_set(error, EINVAL,
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+ RTE_FLOW_ERROR_TYPE_ITEM, item,
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+ "VLAN item is conflict with 'has_vlan is 0' in ETH item");
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+
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+ if (rule->has_more_vlan_m && !rule->has_more_vlan_v)
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+ return rte_flow_error_set(error, EINVAL,
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+ RTE_FLOW_ERROR_TYPE_ITEM, item,
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+ "VLAN item is conflict with 'has_more_vlan is 0' in the previous VLAN item");
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+
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+ if (rule->has_vlan_m && rule->has_vlan_v) {
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+ rule->has_vlan_m = false;
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+ rule->key_conf.vlan_num--;
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+ }
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+
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+ if (rule->has_more_vlan_m && rule->has_more_vlan_v) {
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+ rule->has_more_vlan_m = false;
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+ rule->key_conf.vlan_num--;
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+ }
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+
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rule->key_conf.vlan_num++;
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if (rule->key_conf.vlan_num > VLAN_TAG_NUM_MAX)
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return rte_flow_error_set(error, EINVAL,
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@@ -661,8 +688,8 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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if (item->spec == NULL && item->mask == NULL)
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return 0;
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- if (item->mask) {
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- vlan_mask = item->mask;
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+ vlan_mask = item->mask;
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+ if (vlan_mask) {
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if (vlan_mask->hdr.vlan_tci) {
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if (rule->key_conf.vlan_num == 1) {
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hns3_set_bit(rule->input_set, INNER_VLAN_TAG1,
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@@ -676,6 +703,8 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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rte_be_to_cpu_16(vlan_mask->hdr.vlan_tci);
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}
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}
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+ if (vlan_mask->has_more_vlan)
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+ rule->has_more_vlan_m = true;
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}
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vlan_spec = item->spec;
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@@ -685,6 +714,16 @@ hns3_parse_vlan(const struct rte_flow_item *item, struct hns3_fdir_rule *rule,
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else
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rule->key_conf.spec.vlan_tag2 =
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rte_be_to_cpu_16(vlan_spec->hdr.vlan_tci);
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+
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+ if (vlan_mask && vlan_mask->has_more_vlan && vlan_spec->has_more_vlan) {
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+ rule->key_conf.vlan_num++;
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+ if (rule->key_conf.vlan_num > VLAN_TAG_NUM_MAX)
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+ return rte_flow_error_set(error, EINVAL,
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+ RTE_FLOW_ERROR_TYPE_ITEM, item,
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+ "Vlan_num is more than 2");
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+ rule->has_more_vlan_v = true;
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+ }
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+
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return 0;
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}
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--
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2.33.0
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143
0045-net-hns3-add-Rx-DMA-address-align-check.patch
Normal file
143
0045-net-hns3-add-Rx-DMA-address-align-check.patch
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@ -0,0 +1,143 @@
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From 1f8c7c7852ba41f57f23989d87d235ea508b7bc1 Mon Sep 17 00:00:00 2001
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|
From: Chengwen Feng <fengchengwen@huawei.com>
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|
Date: Mon, 15 Jul 2024 10:04:39 +0800
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|
Subject: [PATCH] net/hns3: add Rx DMA address align check
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[ upstream commit 3317515e9377c13e458e31a64f8987a9d1f2eaf6 ]
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|
|
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|
The network engine has Rx DMA address align requirement, if this
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|
requirement is violated, the Rx function will be abnormal. The detail
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|
requirement is:
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|
1) For HIP08 platform, require 64-bytes alignment.
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|
2) For later platform, require 128-bytes alignment.
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|
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|
The setup Rx DMA address exists both on the control and data plane, to
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|
ensure performance, the alignment check is added only on the control
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|
plane.
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|
|
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|
Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
|
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|
Cc: stable@dpdk.org
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|
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|
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
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|
Signed-off-by: Jie Hai <haijie1@huawei.com>
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|
---
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|
drivers/net/hns3/hns3_ethdev.c | 2 ++
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|
drivers/net/hns3/hns3_ethdev.h | 8 ++++++++
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|
drivers/net/hns3/hns3_ethdev_vf.c | 2 ++
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|
drivers/net/hns3/hns3_rxtx.c | 21 +++++++++++++++++++++
|
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|
4 files changed, 33 insertions(+)
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|
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|
diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c
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|
index 9730b9a..2340fb2 100644
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|
--- a/drivers/net/hns3/hns3_ethdev.c
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|
+++ b/drivers/net/hns3/hns3_ethdev.c
|
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|
@@ -2738,6 +2738,7 @@ hns3_get_capability(struct hns3_hw *hw)
|
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|
hw->rss_info.ipv6_sctp_offload_supported = false;
|
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|
hw->udp_cksum_mode = HNS3_SPECIAL_PORT_SW_CKSUM_MODE;
|
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|
pf->support_multi_tc_pause = false;
|
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|
+ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64;
|
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|
return 0;
|
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|
}
|
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|
|
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|
@@ -2758,6 +2759,7 @@ hns3_get_capability(struct hns3_hw *hw)
|
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|
hw->rss_info.ipv6_sctp_offload_supported = true;
|
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|
hw->udp_cksum_mode = HNS3_SPECIAL_PORT_HW_CKSUM_MODE;
|
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|
pf->support_multi_tc_pause = true;
|
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|
+ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128;
|
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|
|
||||||
|
return 0;
|
||||||
|
}
|
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|
diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
|
||||||
|
index e70c5ff..c190d51 100644
|
||||||
|
--- a/drivers/net/hns3/hns3_ethdev.h
|
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|
+++ b/drivers/net/hns3/hns3_ethdev.h
|
||||||
|
@@ -487,6 +487,9 @@ struct hns3_queue_intr {
|
||||||
|
#define HNS3_PKTS_DROP_STATS_MODE1 0
|
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|
#define HNS3_PKTS_DROP_STATS_MODE2 1
|
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|
|
||||||
|
+#define HNS3_RX_DMA_ADDR_ALIGN_128 128
|
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|
+#define HNS3_RX_DMA_ADDR_ALIGN_64 64
|
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|
+
|
||||||
|
struct hns3_hw {
|
||||||
|
struct rte_eth_dev_data *data;
|
||||||
|
void *io_base;
|
||||||
|
@@ -554,6 +557,11 @@ struct hns3_hw {
|
||||||
|
* direction.
|
||||||
|
*/
|
||||||
|
uint8_t min_tx_pkt_len;
|
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|
+ /*
|
||||||
|
+ * The required alignment of the DMA address of the RX buffer.
|
||||||
|
+ * See HNS3_RX_DMA_ADDR_ALIGN_XXX for available values.
|
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|
+ */
|
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|
+ uint16_t rx_dma_addr_align;
|
||||||
|
|
||||||
|
struct hns3_queue_intr intr;
|
||||||
|
/*
|
||||||
|
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c b/drivers/net/hns3/hns3_ethdev_vf.c
|
||||||
|
index 4eeb46a..465280d 100644
|
||||||
|
--- a/drivers/net/hns3/hns3_ethdev_vf.c
|
||||||
|
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
|
||||||
|
@@ -707,6 +707,7 @@ hns3vf_get_capability(struct hns3_hw *hw)
|
||||||
|
hw->min_tx_pkt_len = HNS3_HIP08_MIN_TX_PKT_LEN;
|
||||||
|
hw->rss_info.ipv6_sctp_offload_supported = false;
|
||||||
|
hw->promisc_mode = HNS3_UNLIMIT_PROMISC_MODE;
|
||||||
|
+ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_64;
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -724,6 +725,7 @@ hns3vf_get_capability(struct hns3_hw *hw)
|
||||||
|
hw->drop_stats_mode = HNS3_PKTS_DROP_STATS_MODE2;
|
||||||
|
hw->rss_info.ipv6_sctp_offload_supported = true;
|
||||||
|
hw->promisc_mode = HNS3_LIMIT_PROMISC_MODE;
|
||||||
|
+ hw->rx_dma_addr_align = HNS3_RX_DMA_ADDR_ALIGN_128;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
diff --git a/drivers/net/hns3/hns3_rxtx.c b/drivers/net/hns3/hns3_rxtx.c
|
||||||
|
index d43cc96..0203bde 100644
|
||||||
|
--- a/drivers/net/hns3/hns3_rxtx.c
|
||||||
|
+++ b/drivers/net/hns3/hns3_rxtx.c
|
||||||
|
@@ -273,12 +273,27 @@ hns3_free_all_queues(struct rte_eth_dev *dev)
|
||||||
|
hns3_free_tx_queues(dev);
|
||||||
|
}
|
||||||
|
|
||||||
|
+static int
|
||||||
|
+hns3_check_rx_dma_addr(struct hns3_hw *hw, uint64_t dma_addr)
|
||||||
|
+{
|
||||||
|
+ uint64_t rem;
|
||||||
|
+
|
||||||
|
+ rem = dma_addr & (hw->rx_dma_addr_align - 1);
|
||||||
|
+ if (rem > 0) {
|
||||||
|
+ hns3_err(hw, "The IO address of the beginning of the mbuf data "
|
||||||
|
+ "must be %u-byte aligned", hw->rx_dma_addr_align);
|
||||||
|
+ return -EINVAL;
|
||||||
|
+ }
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
static int
|
||||||
|
hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq)
|
||||||
|
{
|
||||||
|
struct rte_mbuf *mbuf;
|
||||||
|
uint64_t dma_addr;
|
||||||
|
uint16_t i;
|
||||||
|
+ int ret;
|
||||||
|
|
||||||
|
for (i = 0; i < rxq->nb_rx_desc; i++) {
|
||||||
|
mbuf = rte_mbuf_raw_alloc(rxq->mb_pool);
|
||||||
|
@@ -299,6 +314,12 @@ hns3_alloc_rx_queue_mbufs(struct hns3_hw *hw, struct hns3_rx_queue *rxq)
|
||||||
|
dma_addr = rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
|
||||||
|
rxq->rx_ring[i].addr = dma_addr;
|
||||||
|
rxq->rx_ring[i].rx.bd_base_info = 0;
|
||||||
|
+
|
||||||
|
+ ret = hns3_check_rx_dma_addr(hw, dma_addr);
|
||||||
|
+ if (ret != 0) {
|
||||||
|
+ hns3_rx_queue_release_mbufs(rxq);
|
||||||
|
+ return ret;
|
||||||
|
+ }
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
--
|
||||||
|
2.33.0
|
||||||
|
|
||||||
10
dpdk.spec
10
dpdk.spec
@ -10,7 +10,7 @@
|
|||||||
|
|
||||||
Name: dpdk
|
Name: dpdk
|
||||||
Version: 23.11
|
Version: 23.11
|
||||||
Release: 18
|
Release: 19
|
||||||
URL: http://dpdk.org
|
URL: http://dpdk.org
|
||||||
Source: https://fast.dpdk.org/rel/dpdk-%{version}.tar.xz
|
Source: https://fast.dpdk.org/rel/dpdk-%{version}.tar.xz
|
||||||
|
|
||||||
@ -68,6 +68,9 @@ Patch6042: 0042-dma-hisilicon-remove-support-for-HIP09-platform.patch
|
|||||||
|
|
||||||
Patch9037: 0043-remove-symbol-for-examples-and-app.patch
|
Patch9037: 0043-remove-symbol-for-examples-and-app.patch
|
||||||
|
|
||||||
|
Patch6044: 0044-net-hns3-support-more-VLAN-fields-matching.patch
|
||||||
|
Patch6045: 0045-net-hns3-add-Rx-DMA-address-align-check.patch
|
||||||
|
|
||||||
BuildRequires: meson
|
BuildRequires: meson
|
||||||
BuildRequires: python3-pyelftools
|
BuildRequires: python3-pyelftools
|
||||||
BuildRequires: diffutils
|
BuildRequires: diffutils
|
||||||
@ -263,6 +266,11 @@ strip -g $RPM_BUILD_ROOT/lib/modules/%{kern_devel_ver}/extra/dpdk/igb_uio.ko
|
|||||||
%endif
|
%endif
|
||||||
|
|
||||||
%changelog
|
%changelog
|
||||||
|
* Tue Jul 23 2024 huangdengdui <huangdengui@huawei.com> - 23.11-19
|
||||||
|
Support more VLAN fields matching for hns3 and sync a bugfix
|
||||||
|
- net/hns3: add Rx DMA address align check
|
||||||
|
- net/hns3: support more VLAN fields matching
|
||||||
|
|
||||||
* Mon May 13 2024 yinbin <yinbin8@huawei.com> - 23.11-18
|
* Mon May 13 2024 yinbin <yinbin8@huawei.com> - 23.11-18
|
||||||
- change dpdk-* in dpdk-tools from dynamic build to static build
|
- change dpdk-* in dpdk-tools from dynamic build to static build
|
||||||
- add -s flag to remove symbols of dpdk-* in dpdk-tools
|
- add -s flag to remove symbols of dpdk-* in dpdk-tools
|
||||||
|
|||||||
Loading…
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Reference in New Issue
Block a user