diff --git a/0001-add-support-for-loongarch.patch b/0001-add-support-for-loongarch.patch new file mode 100644 index 0000000..fa4b805 --- /dev/null +++ b/0001-add-support-for-loongarch.patch @@ -0,0 +1,66 @@ +From 538c493d480cf09f5d764553f065581ff1e066b1 Mon Sep 17 00:00:00 2001 +From: Wenlong Zhang +Date: Wed, 19 Jun 2024 14:57:24 +0800 +Subject: [PATCH] add support for loongarch + +--- + include/cln/object.h | 2 +- + include/cln/types.h | 8 ++++---- + 2 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/include/cln/object.h b/include/cln/object.h +index f6da29f..87ce1e3 100644 +--- a/include/cln/object.h ++++ b/include/cln/object.h +@@ -25,7 +25,7 @@ namespace cln { + #if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__)) + #define cl_word_alignment 4 + #endif +-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) ++#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) + #define cl_word_alignment 8 + #endif + #if !defined(cl_word_alignment) +diff --git a/include/cln/types.h b/include/cln/types.h +index 7ec3770..519954a 100644 +--- a/include/cln/types.h ++++ b/include/cln/types.h +@@ -51,7 +51,7 @@ + #undef HAVE_LONGLONG + #endif + #endif +- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) ++ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) + // 64 bit registers in hardware + #define HAVE_FAST_LONGLONG + #endif +@@ -79,7 +79,7 @@ + + // Integer type used for counters. + // Constraint: sizeof(uintC) >= sizeof(uintL) +- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) ++ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #define intCsize long_bitsize + typedef long sintC; + typedef unsigned long uintC; +@@ -91,7 +91,7 @@ + + // Integer type used for lfloat exponents. + // Constraint: sizeof(uintE) >= sizeof(uintC) +- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) ++ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #define intEsize 64 + typedef sint64 sintE; + typedef uint64 uintE; +@@ -132,7 +132,7 @@ + typedef int sintD; + typedef unsigned int uintD; + #else // we are not using GMP, so just guess something reasonable +- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__))) ++ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64))) + #define intDsize 64 + typedef sint64 sintD; + typedef uint64 uintD; +-- +2.43.0 + diff --git a/cln.spec b/cln.spec index c5f4c11..fee42bd 100644 --- a/cln.spec +++ b/cln.spec @@ -1,10 +1,11 @@ Name: cln Version: 1.3.6 -Release: 3 +Release: 4 Summary: Class Library for Numbers License: GPL-2.0-or-later URL: https://www.ginac.de/CLN/ Source0: https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2 +Patch001: 0001-add-support-for-loongarch.patch BuildRequires: gcc-c++ BuildRequires: gmp-devel @@ -38,6 +39,7 @@ the CLN library. %prep %setup -q +%patch001 -p1 %build %configure --disable-static CXXFLAGS="%{XFLAGS}" CFLAGS="%{XFLAGS}" @@ -69,6 +71,9 @@ make %{_smp_mflags} check %doc doc/cln.pdf doc/cln.html %changelog +* Wed Jun 19 2024 Wenlong Zhang - 1.3.6-4 +- add support for loongarch + * Wed Oct 11 2023 misaka00251 - 1.3.6-3 - Fix build on riscv64