diff --git a/0002-add-sw_64-support.patch b/0002-add-sw_64-support.patch
new file mode 100644
index 0000000..bb7e4fb
--- /dev/null
+++ b/0002-add-sw_64-support.patch
@@ -0,0 +1,66 @@
+From e5a9d472804fe141f5796b9bde5a7b85dca6d1de Mon Sep 17 00:00:00 2001
+From: Hailiang <mahailiang@uniontech.com>
+Date: Fri, 7 Mar 2025 17:22:37 +0800
+Subject: [PATCH] add sw_64 support
+
+---
+ include/cln/object.h | 2 +-
+ include/cln/types.h  | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/include/cln/object.h b/include/cln/object.h
+index 87ce1e3..8bd859b 100644
+--- a/include/cln/object.h
++++ b/include/cln/object.h
+@@ -25,7 +25,7 @@ namespace cln {
+ #if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__))
+   #define cl_word_alignment  4
+ #endif
+-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)
++#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
+   #define cl_word_alignment  8
+ #endif
+ #if !defined(cl_word_alignment)
+diff --git a/include/cln/types.h b/include/cln/types.h
+index 519954a..b73ae7f 100644
+--- a/include/cln/types.h
++++ b/include/cln/types.h
+@@ -51,7 +51,7 @@
+     #undef HAVE_LONGLONG
+    #endif
+   #endif
+-  #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64)
++  #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) || defined(_M_AMD64)) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)
+     // 64 bit registers in hardware
+     #define HAVE_FAST_LONGLONG
+   #endif
+@@ -79,7 +79,7 @@
+ 
+ // Integer type used for counters.
+ // Constraint: sizeof(uintC) >= sizeof(uintL)
+-  #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
++  #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
+     #define intCsize long_bitsize
+     typedef long           sintC;
+     typedef unsigned long  uintC;
+@@ -91,7 +91,7 @@
+ 
+ // Integer type used for lfloat exponents.
+ // Constraint: sizeof(uintE) >= sizeof(uintC)
+-  #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
++  #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(__sw_64__)))
+     #define intEsize 64
+     typedef sint64  sintE;
+     typedef uint64  uintE;
+@@ -132,7 +132,7 @@
+     typedef int sintD;
+     typedef unsigned int uintD;
+   #else  // we are not using GMP, so just guess something reasonable
+-    #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64)))
++    #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64) || defined(__e2k__) || defined(__loongarch_lp64) || defined(_sw_64__)))
+       #define intDsize 64
+       typedef sint64  sintD;
+       typedef uint64  uintD;
+-- 
+2.20.1
+
diff --git a/cln.spec b/cln.spec
index fee42bd..efcb34d 100644
--- a/cln.spec
+++ b/cln.spec
@@ -1,11 +1,12 @@
 Name:           cln
 Version:        1.3.6
-Release:        4
+Release:        5
 Summary:        Class Library for Numbers
 License:        GPL-2.0-or-later
 URL:            https://www.ginac.de/CLN/
 Source0:        https://www.ginac.de/CLN/%{name}-%{version}.tar.bz2
 Patch001:	0001-add-support-for-loongarch.patch
+Patch002:	0002-add-sw_64-support.patch
 
 BuildRequires:  gcc-c++
 BuildRequires:  gmp-devel
@@ -40,6 +41,7 @@ the CLN library.
 %prep
 %setup -q
 %patch001 -p1
+%patch002 -p1
 	
 %build
 %configure --disable-static CXXFLAGS="%{XFLAGS}" CFLAGS="%{XFLAGS}"
@@ -71,6 +73,9 @@ make %{_smp_mflags} check
 %doc doc/cln.pdf doc/cln.html
 
 %changelog
+* Thu Mar 06 2025 mahailiang <mahailiang@uniontech.com> - 1.3.6-5
+- add support for sw_64
+
 * Wed Jun 19 2024 Wenlong Zhang <zhangwenlong@loongson.cn> - 1.3.6-4
 - add support for loongarch