From 06ca2eba72fa5c23602f45dfeb770c62d1f20a76 Mon Sep 17 00:00:00 2001 From: luo rixin Date: Wed, 19 May 2021 10:27:18 +0800 Subject: [PATCH] common/crc32c_aarch64: fix crc32c unittest failed on aarch64 On centos 8.2 for aarch64 with gcc 8.3, the complier will use register v0 conflicting with the register v0 be usded in inline asm code. Adding the related registers into clobber list to inform complier avoiding the confict. Fixes: https://tracker.ceph.com/issues/50835 Signed-off-by: luo rixin --- src/common/crc32c_aarch64.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/src/common/crc32c_aarch64.c b/src/common/crc32c_aarch64.c index d15736a0cd..99e5883994 100644 --- a/src/common/crc32c_aarch64.c +++ b/src/common/crc32c_aarch64.c @@ -147,7 +147,7 @@ uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned "mov x16, #0x8014 \n\t" "movk x16, #0x8f15, lsl 16 \n\t" "mov v0.2d[0], x16 \n\t" - :::"x16"); + :::"x16","v0","v1"); while ((length -= 1024) >= 0) { PREF1KL2(1024*3); @@ -178,7 +178,8 @@ uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned "crc32cx %w[c0], wzr, %x[c0] \n\t" "eor %w[c], %w[c], %w[c0] \n\t" :[c1]"+r"(crc1), [c0]"+r"(crc0), [c2]"+r"(crc2), [c]"+r"(crc) - :[v]"r"(*((const uint64_t *)buffer))); + :[v]"r"(*((const uint64_t *)buffer)) + :"v0","v1","v2","v3"); buffer += sizeof(uint64_t); } #endif /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */ @@ -229,7 +230,7 @@ uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned __asm__("mov x16, #0xf38a \n\t" "movk x16, #0xe417, lsl 16 \n\t" "mov v1.2d[0], x16 \n\t" - :::"x16"); + :::"x16","v1"); while ((length -= 1024) >= 0) { __asm__("crc32cx %w[c0], %w[c], xzr\n\t" @@ -247,7 +248,8 @@ uint32_t ceph_crc32c_aarch64(uint32_t crc, unsigned char const *buffer, unsigned "mov %x[c0], v3.2d[0] \n\t" "crc32cx %w[c], wzr, %x[c0] \n\t" :[c]"=r"(crc) - :[c0]"r"(crc0)); + :[c0]"r"(crc0) + :"v1","v3"); } #endif /* HAVE_ARMV8_CRC_CRYPTO_INTRINSICS */ -- 2.24.4