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63 Commits

Author SHA1 Message Date
wangzengliang1
3802e9a7cd fix-CVE-2024-48916 
Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
 2025-02-21 10:37:41 +08:00
laokz
798a69b716 riscv64: fix build error 
Self contained arrow version is 6.0.1 which has no RISC-V
support. The build error looks like:

  CMake Error at cmake_modules/SetupCxxFlags.cmake:439 (message):
     SSE4.2 required but compiler doesn't support it.
 2024-05-27 14:34:25 +08:00
zhangzikang1992
582b5a6df6 Add supprot for loongarch64 2024-05-27 09:14:15 +08:00
cenhuilin
f8afc1e75c fix mds metadata lost in one case 
(cherry picked from commit 9a803cb5ccdccadd6794bed72ec19963f5099be8)
 2024-04-16 11:30:14 +08:00
lizhipeng
73de9f080d fix CVE-2023-46159 
Signed-off-by: lizhipeng <qiuxinyidian@gmail.com>
(cherry picked from commit a1487363b2c5ab3308d1110e178f7a75b7ce87db)
 2024-03-26 17:10:35 +08:00
wangzengliang1
f933474f34 upgrade ceph to 18.2.2 
Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
(cherry picked from commit 79d53b153fe5423df09d0d7c68a93c8806d51a89)
 2024-03-16 15:32:38 +08:00
wangzengliang1
e44d9262b2 fix compilation with cython3 
Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
 2024-02-01 11:54:00 +08:00
wangzengliang1
c84338fed8 删除ceph-16.2.7版本相关文件 
Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
 2024-01-30 15:23:30 +08:00
wangzengliang1
62cfbef3bf init ceph-18.2.1 on openEuler 
modify xsimd source to local and set cxx 17 for arrow

Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
 2024-01-29 20:14:36 +08:00
wangzengliang1
87b45b7118 添加xsimd相关包，用于master版本ceph升级至18.2.1 
Signed-off-by: wangzengliang1 <wangzengliang2@huawei.com>
 2024-01-26 17:25:46 +08:00
wangzengliang
55becf4a50 fix CVE-2023-43040 2023-10-09 11:09:16 +08:00
laokz
9ec8579c89 riscv64: fix 16-byte atomic build error 
Ceph source include boost package. Boost not implement atomic
functions for RISC-V. Set riscv to the ceph autodect arches.
 2023-08-23 14:16:35 +08:00
liuqinfei
6e5f3cec37 fix conflicts among multiple processor architectures 
Signed-off-by: liuqinfei <lucas.liuqinfei@huawei.com>
 2023-08-21 21:04:38 +08:00
wangzengliang
ed44de8907 fix compile with gcc12 2023-07-21 17:57:13 +08:00
wangzengliang
3dadda505f include memory for gcc13 2023-07-21 17:29:16 +08:00
wangzengliang
0bf16aa9c8 Fix Python 3.10(PEP-620) incompatibility 2023-07-21 16:54:41 +08:00
TomNewChao
ed2efbe6b1 ceph mgr dashboard support multi-language 2023-05-30 21:43:17 +08:00
yangxiaoliang
a131133c76 add judgment for ceph-volume lvm activate 
Signed-off-by: Xiaoliang Yang <yangxiaoliang07@163.com>
 2023-04-10 10:40:19 +08:00
wangzengliang
fe72c4034e fix userdel command error 2023-03-25 09:52:43 +08:00
wangzengliang
31a1f455fd fix error uninstall cephadm 2023-03-01 09:25:15 +08:00
wangzengliang
73e4176810 Merge branch 'master' of gitee.com:src-openeuler/ceph into master 
Signed-off-by: wangzengliang <wangzengliang2@huawei.com>
 2023-02-10 03:33:24 +00:00
liuqinfei
cc6458e881 fix lack of python symbol 2023-02-06 17:22:52 +08:00
wangzengliang1
4984e86ad0 fix CVE-2022-3854 2023-01-30 10:54:13 +08:00
Wenlong Zhang
3b958eb678 add loongarch support for ceph 2023-01-16 10:40:14 +08:00
yaoguangzhong
ea63c167f4 fix no module named v1_event for mgr k8sevent 
category: bugfix
bugzilla: https://gitee.com/src-openeuler/ceph/issues/I6757B#note_15306156

Signed-off-by: Guangzhong Yao <yaoguangzhong@xfusion.com>
 2022-12-28 12:50:01 +08:00
Wang Lin
cb3ac76653 fix macro typo 2022-12-21 10:09:42 +08:00
Wang Lin
bad9faa150 use vendor in buildrequire package 2022-12-20 14:53:38 +08:00
wangzengliang1
6a15e33bc4 fix CVE-2022-3650 2022-12-05 15:36:14 +08:00
wangzengliang1
ef7e94a7f2 keep the ceph.spec align with native community 2022-11-15 19:34:17 +08:00
wangzengliang1
7410f0be2d fix cve-2022-0670 2022-11-15 10:51:40 +08:00
wangzengliang1
d429a1a6cf rename sw64 patch and reduce compilation threads 2022-11-10 10:13:05 +08:00
wzx
874e2535c3 Add sw64 architecture 
Signed-off-by: wzx <wuzx1226@qq.com>
 2022-11-02 17:32:19 +08:00
luo rixin
a7112a309a bluestore: 修复OSD读取superblock错误问题 
在aarch64平台64K页大小情况下，osd采用direct write写superblock到地址8k-12k，
采用buffer write写设备标签到地址0-4k，针对buffer write操作系统会按页对齐刷盘，
superblock和设备标签刚好在同一个页上，刷盘导致superblock被覆盖，无法读出正确的数据。
将写设备标签改成direct write修复此问题。

Signed-off-by: luo rixin <luorixin@huawei.com>
 2022-09-28 14:05:24 +08:00
yangxiaoliang
ec05ef512b ceph-volume: decrease number of pvs calls in lvm list 2022-08-25 10:43:18 +08:00
yangxiaoliang
e38a529796 修改 ceph-volume lvm api 函数未定义问题2 2022-07-25 10:50:24 +08:00
wangzengliang
c7e43dd962
update ceph.spec. 2022-05-19 03:21:23 +00:00
wangzengliang
bd50d3a02e cmake: add support python 3.10 2022-04-08 09:07:14 +08:00
wangzengliang
173682e272 Merge branch 'openEuler-22.03-LTS' of https://gitee.com/wangzengliang1/ceph into openEuler-22.03-LTS 2022-04-08 08:47:42 +08:00
wangzengliang
c715e2d9e8
update ceph.spec. 2022-03-16 04:01:23 +00:00
wangzengliang
8a016a4d06
update ceph.spec. 
revert jobs to 32 
modify mem_per_processor to 3000
 2022-03-16 01:32:29 +00:00
wangzengliang
ee78a1f028
update ceph.spec. 2022-03-15 04:13:30 +00:00
wangzengliang
14c0278485
update ceph.spec. 2022-03-14 01:45:56 +00:00
wangzengliang
71a11bb9b1 Merge branch 'openEuler-22.03-LTS' of gitee.com:src-openeuler/ceph into modify-to-x2a 2022-03-14 01:38:06 +00:00
wangzengliang
0c4b5f4c28 fix * recognition error when install 2022-03-11 18:54:40 +08:00
wangzengliang
d102e7384e test build 2022-03-10 20:23:24 +08:00
wangzengliang
c8fcbec948 modify \* to \x2a 2022-03-09 14:39:47 +08:00
luo rixin
b8011f81a7 isa-l: update isa-l to fix aarch64 text relocation error 
Signed-off-by: luo rixin <luorixin@huawei.com>
(cherry picked from commit becd4f820ebdfaaae8d07cdfc0ecb2d7e184ddaf)
 2022-02-16 15:04:51 +08:00
luo rixin
becd4f820e isa-l: update isa-l to fix aarch64 text relocation error 
Signed-off-by: luo rixin <luorixin@huawei.com>
 2022-01-15 15:45:36 +08:00
liuqinfei
5874fbb9de update to 16.2.7 2022-01-11 20:46:59 +08:00
markeryang
1272ab0995 fix build error PTHREAD_STACJK_MIN 
(cherry picked from commit ef5327233c80cc755aeeb75efdfaf2bedd382491)
 2021-08-14 18:54:59 +08:00