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binutils/0029-x86-consistently-use-scalar_mode-for-AVX512-FP16-sca.patch
dingguangya ccc9d8c777 Enable Intel AVX512_FP16 instructions 
(cherry picked from commit dc957bc9fadac974c5930b19a52129ff17dd2fae)
2022-09-05 11:14:32 +08:00

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From 928c8d70c82feea45683b43e324cd2079d4ee31d Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Fri, 14 Jan 2022 10:55:42 +0100
Subject: [PATCH] x86: consistently use scalar_mode for AVX512-FP16 scalar
insns
For some reason the original AVFX512F insns were not taken as a basis
here, causing unnecessary divergence. While not an active issue, it is
still relevant to note that OP_XMM() has special treatment of e.g.
scalar_mode (marking broadcast as invalid). Such would better be
consistent for all sufficiently similar insns.
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index fc5439a1fec..140c4e850b4 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -440,7 +440,7 @@
},
/* PREFIX_EVEX_MAP5_1D */
{
- { "vcvtss2s%XH", { XMM, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
{ "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
},
@@ -470,24 +470,24 @@
/* PREFIX_EVEX_MAP5_51 */
{
{ "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 },
- { "vsqrts%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_58 */
{
{ "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vadds%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_59 */
{
{ "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vmuls%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5A */
{
{ "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
- { "vcvts%XH2sd", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
- { "vcvts%XD2sh", { XMM, VexScalar, EXq, EXxEVexR }, 0 },
+ { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5B */
{
@@ -498,22 +498,22 @@
/* PREFIX_EVEX_MAP5_5C */
{
{ "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vsubs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5D */
{
{ "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmins%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_5E */
{
{ "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
- { "vdivs%XH", { XMM, VexScalar, EXw, EXxEVexR }, 0 },
+ { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP5_5F */
{
{ "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
- { "vmaxs%XH", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_MAP5_78 */
{
@@ -555,7 +555,7 @@
},
/* PREFIX_EVEX_MAP6_13 */
{
- { "vcvts%XH2ss", { XMM, VexScalar, EXw, EXxEVexS }, 0 },
+ { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
{ Bad_Opcode },
{ "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
},
@@ -569,9 +569,9 @@
/* PREFIX_EVEX_MAP6_57 */
{
{ Bad_Opcode },
- { "vfmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmaddcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},
/* PREFIX_EVEX_MAP6_D6 */
{
@@ -583,7 +583,7 @@
/* PREFIX_EVEX_MAP6_D7 */
{
{ Bad_Opcode },
- { "vfmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
{ Bad_Opcode },
- { "vfcmulcs%XH", { { DistinctDest_Fixup, xmm_mode }, VexScalar, EXd, EXxEVexR }, 0 },
+ { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
},
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 5d621cf1557..fe39026a871 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -1216,7 +1216,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vscalefp%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vscalefs%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vscalefs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
/* 30 */
@@ -1241,7 +1241,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vgetexpp%XH", { XM, EXxh, EXxEVexS }, PREFIX_DATA },
- { "vgetexps%XH", { XMM, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
+ { "vgetexps%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, PREFIX_DATA },
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1252,9 +1252,9 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ "vrcpp%XH", { XM, EXxh }, PREFIX_DATA },
- { "vrcps%XH", { XMM, VexScalar, EXw }, PREFIX_DATA },
+ { "vrcps%XH", { XMScalar, VexScalar, EXw }, PREFIX_DATA },
{ "vrsqrtp%XH", { XM, EXxh }, PREFIX_DATA },
- { "vrsqrts%XH", { XMM, VexScalar, EXw }, PREFIX_DATA },
+ { "vrsqrts%XH", { XMScalar, VexScalar, EXw }, PREFIX_DATA },
/* 50 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1338,13 +1338,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* 98 */
{ "vfmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub132p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub132s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub132s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* A0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1356,13 +1356,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* A8 */
{ "vfmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub213p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub213s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub213s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* B0 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -1374,13 +1374,13 @@ static const struct dis386 evex_table[][256] = {
{ "vfmsubadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
/* B8 */
{ "vfmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmadd231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfmsub231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmadd231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmadd231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmadd231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
{ "vfnmsub231p%XH", { XM, Vex, EXxh, EXxEVexR }, PREFIX_DATA },
- { "vfnmsub231s%XH", { XMM, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
+ { "vfnmsub231s%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, PREFIX_DATA },
/* C0 */
{ Bad_Opcode },
{ Bad_Opcode },
--
2.33.0
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