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binutils/0002-x86-drop-OP_Mask.patch

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Enable Intel AVX512_FP16 instructions (cherry picked from commit dc957bc9fadac974c5930b19a52129ff17dd2fae)
2022-08-11 09:54:50 +08:00
From d0579d4d1c724b524da43ad164ce140218497ead Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:01:09 +0200
Subject: [PATCH] x86: drop OP_Mask()
By moving its vex.r check there it becomes fully redundant with OP_G().
diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 50a11f417ad..2ed8f6730c5 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -151,9 +151,9 @@
},
/* PREFIX_EVEX_0FC2 */
{
- { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+ { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_1) },
- { "vcmppX", { XMask, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
+ { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
{ VEX_W_TABLE (EVEX_W_0FC2_P_3) },
},
/* PREFIX_EVEX_0FE6 */
@@ -238,14 +238,14 @@
/* PREFIX_EVEX_0F3826 */
{
{ Bad_Opcode },
- { "vptestnm%BW", { XMask, Vex, EXx }, 0 },
- { "vptestm%BW", { XMask, Vex, EXx }, 0 },
+ { "vptestnm%BW", { MaskG, Vex, EXx }, 0 },
+ { "vptestm%BW", { MaskG, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3827 */
{
{ Bad_Opcode },
- { "vptestnm%DQ", { XMask, Vex, EXx }, 0 },
- { "vptestm%DQ", { XMask, Vex, EXx }, 0 },
+ { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 },
+ { "vptestm%DQ", { MaskG, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F3828 */
{
@@ -256,7 +256,7 @@
/* PREFIX_EVEX_0F3829 */
{
{ Bad_Opcode },
- { "vpmov%BW2m", { XMask, EXx }, 0 },
+ { "vpmov%BW2m", { MaskG, EXx }, 0 },
{ VEX_W_TABLE (EVEX_W_0F3829_P_2) },
},
/* PREFIX_EVEX_0F382A */
@@ -310,7 +310,7 @@
/* PREFIX_EVEX_0F3839 */
{
{ Bad_Opcode },
- { "vpmov%DQ2m", { XMask, EXx }, 0 },
+ { "vpmov%DQ2m", { MaskG, EXx }, 0 },
{ "vpmins%DQ", { XM, Vex, EXx }, 0 },
},
/* PREFIX_EVEX_0F383A */
@@ -338,7 +338,7 @@
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vp2intersect%DQ", { XMask, Vex, EXx, EXxEVexS }, 0 },
+ { "vp2intersect%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
},
/* PREFIX_EVEX_0F3872 */
{
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 637ab846562..2c7d9bc2e34 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -142,7 +142,7 @@
},
/* EVEX_W_0F66 */
{
- { "vpcmpgtd", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtd", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F6A */
{
@@ -201,7 +201,7 @@
},
/* EVEX_W_0F76 */
{
- { "vpcmpeqd", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqd", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F78_P_0 */
{
@@ -270,12 +270,12 @@
},
/* EVEX_W_0FC2_P_1 */
{
- { "vcmpss", { XMask, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
+ { "vcmpss", { MaskG, VexScalar, EXxmm_md, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FC2_P_3 */
{
{ Bad_Opcode },
- { "vcmpsd", { XMask, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
+ { "vcmpsd", { MaskG, VexScalar, EXxmm_mq, EXxEVexS, CMP }, 0 },
},
/* EVEX_W_0FD2 */
{
@@ -450,7 +450,7 @@
/* EVEX_W_0F3829_P_2 */
{
{ Bad_Opcode },
- { "vpcmpeqq", { XMask, Vex, EXx }, 0 },
+ { "vpcmpeqq", { MaskG, Vex, EXx }, 0 },
},
/* EVEX_W_0F382A_P_1 */
{
@@ -496,7 +496,7 @@
/* EVEX_W_0F3837 */
{
{ Bad_Opcode },
- { "vpcmpgtq", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtq", { MaskG, Vex, EXx }, PREFIX_DATA },
},
/* EVEX_W_0F383A_P_1 */
{
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 151f61d95a4..5f1ebaded85 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -114,8 +114,8 @@ static const struct dis386 evex_table[][256] = {
{ "vpunpcklwd", { XM, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F62) },
{ "vpacksswb", { XM, Vex, EXx }, PREFIX_DATA },
- { "vpcmpgtb", { XMask, Vex, EXx }, PREFIX_DATA },
- { "vpcmpgtw", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtb", { MaskG, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpgtw", { MaskG, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F66) },
{ "vpackuswb", { XM, Vex, EXx }, PREFIX_DATA },
/* 68 */
@@ -132,8 +132,8 @@ static const struct dis386 evex_table[][256] = {
{ REG_TABLE (REG_EVEX_0F71) },
{ REG_TABLE (REG_EVEX_0F72) },
{ REG_TABLE (REG_EVEX_0F73) },
- { "vpcmpeqb", { XMask, Vex, EXx }, PREFIX_DATA },
- { "vpcmpeqw", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqb", { MaskG, Vex, EXx }, PREFIX_DATA },
+ { "vpcmpeqw", { MaskG, Vex, EXx }, PREFIX_DATA },
{ VEX_W_TABLE (EVEX_W_0F76) },
{ Bad_Opcode },
/* 78 */
@@ -453,7 +453,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ "vperm%BW", { XM, Vex, EXx }, PREFIX_DATA },
{ Bad_Opcode },
- { "vpshufbitqmb", { XMask, Vex, EXx }, PREFIX_DATA },
+ { "vpshufbitqmb", { MaskG, Vex, EXx }, PREFIX_DATA },
/* 90 */
{ "vpgatherd%DQ", { XMGatherD, MVexVSIBDWpX }, PREFIX_DATA },
{ "vpgatherq%DQ", { XMGatherQ, MVexVSIBQWpX }, PREFIX_DATA },
@@ -617,8 +617,8 @@ static const struct dis386 evex_table[][256] = {
{ EVEX_LEN_TABLE (EVEX_LEN_0F3A1B) },
{ Bad_Opcode },
{ VEX_W_TABLE (VEX_W_0F3A1D) },
- { "vpcmpu%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
- { "vpcmp%DQ", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmpu%DQ", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmp%DQ", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
/* 20 */
{ VEX_LEN_TABLE (VEX_LEN_0F3A20) },
{ VEX_W_TABLE (EVEX_W_0F3A21) },
@@ -653,8 +653,8 @@ static const struct dis386 evex_table[][256] = {
{ EVEX_LEN_TABLE (EVEX_LEN_0F3A3B) },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vpcmpu%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
- { "vpcmp%BW", { XMask, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmpu%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
+ { "vpcmp%BW", { MaskG, Vex, EXx, VPCMP }, PREFIX_DATA },
/* 40 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -698,8 +698,8 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { "vfpclassp%XW%XZ", { XMask, EXx, Ib }, PREFIX_DATA },
- { "vfpclasss%XW", { XMask, EXVexWdqScalar, Ib }, PREFIX_DATA },
+ { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, PREFIX_DATA },
+ { "vfpclasss%XW", { MaskG, EXVexWdqScalar, Ib }, PREFIX_DATA },
/* 68 */
{ Bad_Opcode },
{ Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 122f4af0b46..f88276ced6b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -116,8 +116,6 @@ static void FXSAVE_Fixup (int, int);
static void MOVSXD_Fixup (int, int);
-static void OP_Mask (int, int);
-
struct dis_private {
/* Points to first byte not fetched. */
bfd_byte *max_fetched;
@@ -406,7 +404,6 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EXxEVexR64 { OP_Rounding, evex_rounding_64_mode }
#define EXxEVexS { OP_Rounding, evex_sae_mode }
-#define XMask { OP_Mask, mask_mode }
#define MaskG { OP_G, mask_mode }
#define MaskE { OP_E, mask_mode }
#define MaskBDE { OP_E, mask_bd_mode }
@@ -12017,12 +12014,12 @@ OP_G (int bytemode, int sizeflag)
break;
case mask_bd_mode:
case mask_mode:
- if ((modrm.reg + add) > 0x7)
+ if (add || (vex.evex && !vex.r))
{
oappend ("(bad)");
return;
}
- oappend (names_mask[modrm.reg + add]);
+ oappend (names_mask[modrm.reg]);
break;
default:
oappend (INTERNAL_DISASSEMBLER_ERROR);
@@ -13720,23 +13717,6 @@ MOVSXD_Fixup (int bytemode, int sizeflag)
OP_E (bytemode, sizeflag);
}
-static void
-OP_Mask (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
-{
- if (!vex.evex
- || (bytemode != mask_mode && bytemode != mask_bd_mode))
- abort ();
-
- USED_REX (REX_R);
- if ((rex & REX_R) != 0 || !vex.r)
- {
- BadOp ();
- return;
- }
-
- oappend (names_mask [modrm.reg]);
-}
-
static void
OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
{
--
2.33.0
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