2019-12-25 15:42:36 +08:00
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From 76bba5ee850ea391ebdbb54dda5a06a567526dbf Mon Sep 17 00:00:00 2001
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From: Alan Modra <amodra@gmail.com>
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Date: Tue, 10 Dec 2019 18:58:38 +1030
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Subject: [PATCH] ubsan: left shift of cannot be represented in type 'int'
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* dis-asm.h (INSN_HAS_RELOC, DISASSEMBLE_DATA),
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(USER_SPECIFIED_MACHINE_TYPE, WIDE_OUTPUT): Make unsigned.
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* opcode/tic80.h (TIC80_OPERAND_*): Likewise.
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2020-01-11 12:58:38 +08:00
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2019-12-25 15:42:36 +08:00
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---
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include/dis-asm.h | 8 ++++----
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include/opcode/tic80.h | 36 ++++++++++++++++++------------------
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2020-01-11 12:58:38 +08:00
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2 files changed, 22 insertions(+), 22 deletions(-)
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2019-12-25 15:42:36 +08:00
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diff --git a/include/dis-asm.h b/include/dis-asm.h
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2020-01-11 12:58:38 +08:00
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index b4d5025..0e85c52 100644
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2019-12-25 15:42:36 +08:00
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--- a/include/dis-asm.h
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+++ b/include/dis-asm.h
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2020-01-11 12:58:38 +08:00
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@@ -110,14 +110,14 @@ typedef struct disassemble_info
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2019-12-25 15:42:36 +08:00
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unsigned long flags;
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/* Set if the disassembler has determined that there are one or more
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relocations associated with the instruction being disassembled. */
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-#define INSN_HAS_RELOC (1 << 31)
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+#define INSN_HAS_RELOC (1u << 31)
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/* Set if the user has requested the disassembly of data as well as code. */
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-#define DISASSEMBLE_DATA (1 << 30)
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+#define DISASSEMBLE_DATA (1u << 30)
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/* Set if the user has specifically set the machine type encoded in the
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mach field of this structure. */
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-#define USER_SPECIFIED_MACHINE_TYPE (1 << 29)
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+#define USER_SPECIFIED_MACHINE_TYPE (1u << 29)
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/* Set if the user has requested wide output. */
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-#define WIDE_OUTPUT (1 << 28)
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+#define WIDE_OUTPUT (1u << 28)
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2019-12-25 15:42:36 +08:00
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/* Use internally by the target specific disassembly code. */
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void *private_data;
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diff --git a/include/opcode/tic80.h b/include/opcode/tic80.h
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2020-01-11 12:58:38 +08:00
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index 6a68859..240e9aa 100644
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2019-12-25 15:42:36 +08:00
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--- a/include/opcode/tic80.h
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+++ b/include/opcode/tic80.h
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@@ -138,68 +138,68 @@ extern const struct tic80_operand tic80_operands[];
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/* This operand must be an even register number. Floating point numbers
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for example are stored in even/odd register pairs. */
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-#define TIC80_OPERAND_EVEN (1 << 0)
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+#define TIC80_OPERAND_EVEN (1u << 0)
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/* This operand must be an odd register number and must be one greater than
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the register number of the previous operand. I.E. the second register in
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an even/odd register pair. */
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-#define TIC80_OPERAND_ODD (1 << 1)
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+#define TIC80_OPERAND_ODD (1u << 1)
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/* This operand takes signed values. */
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-#define TIC80_OPERAND_SIGNED (1 << 2)
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+#define TIC80_OPERAND_SIGNED (1u << 2)
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/* This operand may be either a predefined constant name or a numeric value.
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An example would be a condition code like "eq0.b" which has the numeric
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value 0x2. */
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-#define TIC80_OPERAND_NUM (1 << 3)
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+#define TIC80_OPERAND_NUM (1u << 3)
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/* This operand should be wrapped in parentheses rather than separated
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from the previous one by a comma. This is used for various
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instructions, like the load and store instructions, which want
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their operands to look like "displacement(reg)" */
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-#define TIC80_OPERAND_PARENS (1 << 4)
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+#define TIC80_OPERAND_PARENS (1u << 4)
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/* This operand is a PC relative branch offset. The disassembler prints
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these symbolically if possible. Note that the offsets are taken as word
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offsets. */
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-#define TIC80_OPERAND_PCREL (1 << 5)
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+#define TIC80_OPERAND_PCREL (1u << 5)
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/* This flag is a hint to the disassembler for using hex as the prefered
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printing format, even for small positive or negative immediate values.
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Normally values in the range -999 to 999 are printed as signed decimal
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values and other values are printed in hex. */
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-#define TIC80_OPERAND_BITFIELD (1 << 6)
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+#define TIC80_OPERAND_BITFIELD (1u << 6)
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/* This operand may have a ":m" modifier specified by bit 17 in a short
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immediate form instruction. */
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-#define TIC80_OPERAND_M_SI (1 << 7)
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+#define TIC80_OPERAND_M_SI (1u << 7)
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/* This operand may have a ":m" modifier specified by bit 15 in a long
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immediate or register form instruction. */
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-#define TIC80_OPERAND_M_LI (1 << 8)
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+#define TIC80_OPERAND_M_LI (1u << 8)
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/* This operand may have a ":s" modifier specified in bit 11 in a long
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immediate or register form instruction. */
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-#define TIC80_OPERAND_SCALED (1 << 9)
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+#define TIC80_OPERAND_SCALED (1u << 9)
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/* This operand is a floating point value */
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-#define TIC80_OPERAND_FLOAT (1 << 10)
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+#define TIC80_OPERAND_FLOAT (1u << 10)
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/* This operand is an byte offset from a base relocation. The lower
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two bits of the final relocated address are ignored when the value is
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written to the program counter. */
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-#define TIC80_OPERAND_BASEREL (1 << 11)
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+#define TIC80_OPERAND_BASEREL (1u << 11)
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/* This operand is an "endmask" field for a shift instruction.
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It is treated special in that it can have values of 0-32,
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@@ -208,29 +208,29 @@ extern const struct tic80_operand tic80_operands[];
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has no way of knowing from the instruction which value was
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given at assembly time, so it just uses '0'. */
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-#define TIC80_OPERAND_ENDMASK (1 << 12)
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+#define TIC80_OPERAND_ENDMASK (1u << 12)
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/* This operand is one of the 32 general purpose registers.
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The disassembler prints these with a leading 'r'. */
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-#define TIC80_OPERAND_GPR (1 << 27)
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+#define TIC80_OPERAND_GPR (1u << 27)
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/* This operand is a floating point accumulator register.
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The disassembler prints these with a leading 'a'. */
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-#define TIC80_OPERAND_FPA ( 1 << 28)
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+#define TIC80_OPERAND_FPA (1u << 28)
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/* This operand is a control register number, either numeric or
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symbolic (like "EIF", "EPC", etc).
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The disassembler prints these symbolically. */
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-#define TIC80_OPERAND_CR (1 << 29)
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+#define TIC80_OPERAND_CR (1u << 29)
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/* This operand is a condition code, either numeric or
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symbolic (like "eq0.b", "ne0.w", etc).
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The disassembler prints these symbolically. */
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-#define TIC80_OPERAND_CC (1 << 30)
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+#define TIC80_OPERAND_CC (1u << 30)
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/* This operand is a bit number, either numeric or
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symbolic (like "eq.b", "or.f", etc).
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@@ -238,7 +238,7 @@ extern const struct tic80_operand tic80_operands[];
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Note that they appear in the instruction in 1's complement relative
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to the values given in the manual. */
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-#define TIC80_OPERAND_BITNUM (1 << 31)
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+#define TIC80_OPERAND_BITNUM (1u << 31)
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/* This mask is used to strip operand bits from an int that contains
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both operand bits and a numeric value in the lsbs. */
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--
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2020-01-11 12:58:38 +08:00
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1.8.3.1
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2019-12-25 15:42:36 +08:00
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