126 lines
3.8 KiB
Bash
126 lines
3.8 KiB
Bash
#!/bin/bash
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function perf_Mem_bw () {
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if dmidecode -t processor | grep -q -E 'Kunpeng|Hisilicon' ; then
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CPU0_Die0_BW_R="hisi_sccl1_ddrc0/flux_rd/,hisi_sccl1_ddrc1/flux_rd/,hisi_sccl1_ddrc2/flux_rd/,hisi_sccl1_ddrc3/flux_rd/"
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CPU0_Die0_BW_W="hisi_sccl1_ddrc0/flux_wr/,hisi_sccl1_ddrc1/flux_wr/,hisi_sccl1_ddrc2/flux_wr/,hisi_sccl1_ddrc3/flux_wr/"
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CPU0_Die1_BW_R="hisi_sccl3_ddrc0/flux_rd/,hisi_sccl3_ddrc1/flux_rd/,hisi_sccl3_ddrc2/flux_rd/,hisi_sccl3_ddrc3/flux_rd/"
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CPU0_Die1_BW_W="hisi_sccl3_ddrc0/flux_wr/,hisi_sccl3_ddrc1/flux_wr/,hisi_sccl3_ddrc2/flux_wr/,hisi_sccl3_ddrc3/flux_wr/"
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CPU1_Die0_BW_R="hisi_sccl5_ddrc0/flux_rd/,hisi_sccl5_ddrc1/flux_rd/,hisi_sccl5_ddrc2/flux_rd/,hisi_sccl5_ddrc3/flux_rd/"
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CPU1_Die0_BW_W="hisi_sccl5_ddrc0/flux_wr/,hisi_sccl5_ddrc1/flux_wr/,hisi_sccl5_ddrc2/flux_wr/,hisi_sccl5_ddrc3/flux_wr/"
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CPU1_Die1_BW_R="hisi_sccl7_ddrc0/flux_rd/,hisi_sccl7_ddrc1/flux_rd/,hisi_sccl7_ddrc2/flux_rd/,hisi_sccl7_ddrc3/flux_rd/"
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CPU1_Die1_BW_W="hisi_sccl7_ddrc0/flux_wr/,hisi_sccl7_ddrc1/flux_wr/,hisi_sccl7_ddrc2/flux_wr/,hisi_sccl7_ddrc3/flux_wr/"
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BW_Events=" $CPU0_Die0_BW_R,$CPU0_Die0_BW_W,$CPU0_Die1_BW_R,$CPU0_Die1_BW_W,$CPU1_Die0_BW_R,$CPU1_Die0_BW_W,$CPU1_Die1_BW_R,$CPU1_Die1_BW_W"
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else
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echo "not Support This CPU Architecture..."
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exit
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fi
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let interval=$interval*1000
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timeout $ts perf stat -x ',' -a -I $interval -e $BW_Events 2>&1 | \
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awk -F, '
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BEGIN {
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tpre=-1;
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first=1;
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}
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{
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tcurr=$1;
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if(first==1)
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{
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tpre=tcurr;
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first=0;
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printf("#################################Start to monitor The System DDR Bandwidth##################################################\n");
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printf(" MEM_Total CPU0 CPU1 CPU0_Die0 CPU0_Die1 CPU1_Die0 CPU1_Die1 MEM_CPU0_Die0_R MEM_CPU0_Die1_R MEM_CPU1_Die0_R MEM_CPU1_Die1_R MEM_CPU0_Die0_W MEM_CPU0_Die1_W MEM_CPU1_Die0_W MEM_CPU1_Die1_W\n");
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}
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if(tcurr != tpre)
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{
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MEM_CPU0_Die0_R = CPU0_Die0_R*32/1024/1024;
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MEM_CPU0_Die1_R = CPU0_Die1_R*32/1024/1024;
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MEM_CPU1_Die0_R = CPU1_Die0_R*32/1024/1024;
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MEM_CPU1_Die1_R = CPU1_Die1_R*32/1024/1024;
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MEM_CPU0_Die0_W = CPU0_Die0_W*32/1024/1024;
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MEM_CPU0_Die1_W = CPU0_Die1_W*32/1024/1024;
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MEM_CPU1_Die0_W = CPU1_Die0_W*32/1024/1024;
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MEM_CPU1_Die1_W = CPU1_Die1_W*32/1024/1024;
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MEM_CPU0_Die0 = MEM_CPU0_Die0_R + MEM_CPU0_Die0_W;
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MEM_CPU0_Die1 = MEM_CPU0_Die1_R + MEM_CPU0_Die1_W;
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MEM_CPU1_Die0 = MEM_CPU1_Die0_R + MEM_CPU1_Die0_W;
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MEM_CPU1_Die1 = MEM_CPU1_Die1_R + MEM_CPU1_Die1_W;
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MEM_CPU0 = MEM_CPU0_Die0_R + MEM_CPU0_Die0_W + MEM_CPU0_Die1_R + MEM_CPU0_Die1_W;
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MEM_CPU1 = MEM_CPU1_Die0_R + MEM_CPU1_Die0_W + MEM_CPU1_Die1_R + MEM_CPU1_Die1_W;
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MEM_Total = MEM_CPU0 + MEM_CPU1;
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printf("%10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f %10.2f\n",MEM_Total,MEM_CPU0,MEM_CPU1,MEM_CPU0_Die0,MEM_CPU0_Die1,MEM_CPU1_Die0,MEM_CPU1_Die1,MEM_CPU0_Die0_R,MEM_CPU0_Die1_R,MEM_CPU1_Die0_R,MEM_CPU1_Die1_R,MEM_CPU0_Die0_W,MEM_CPU0_Die1_W,MEM_CPU1_Die0_W,MEM_CPU1_Die1_W);
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CPU0_Die0_R=0;
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CPU0_Die0_W=0;
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CPU0_Die1_R=0;
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CPU0_Die1_W=0;
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CPU1_Die0_R=0;
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CPU1_Die0_W=0;
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CPU1_Die1_R=0;
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CPU1_Die1_W=0;
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tpre=tcurr;
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}
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switch ($4)
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{
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case /sccl1.*rd/:
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CPU0_Die0_R += $2;
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break;
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case /sccl1.*wr/:
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CPU0_Die0_W += $2;
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break;
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case /sccl3.*rd/:
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CPU0_Die1_R += $2;
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break;
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case /sccl3.*wr/:
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CPU0_Die1_W += $2;
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break;
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case /sccl5.*rd/:
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CPU1_Die0_R += $2;
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break;
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case /sccl5.*wr/:
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CPU1_Die0_W += $2;
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break;
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case /sccl7.*rd/:
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CPU1_Die1_R += $2;
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break;
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case /sccl7.*wr/:
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CPU1_Die1_W += $2;
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break;
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}
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}
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'
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}
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if [ ! $# == 1 ]; then
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echo "Usage: perf_mem.sh sample_interval"
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exit
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fi
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ts=0
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interval=$1
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perf_Mem_bw
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